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...v84_vp-vc1-3 nv84_xuc00f nv84_xuc103 $ vdpauinfo display: :0 screen: 0 API version: 1 Information string: G3DVL VDPAU Driver Shared Library version 1.0 Video surface: name width height types ------------------------------------------- 420 8192 8192 NV12 YV12 422 8192 8192 UYVY YUYV 444 8192 8192 Y8U8V8A8 V8U8Y8A8 Decoder capabilities: name level macbs width height ------------------------------------------- MPEG1 0 16384 2048 2048 MPEG2_SIMPLE 3 16384 2048 2048 MPEG2_MAIN 3 16384 2048 2048 H264_BASELINE...

https://bugs.freedesktop.org/show_bug.cgi?id=86006 Bug ID: 86006 Summary: [NV84] Nvidia GeForce 8600 GT VDPAU h264 hardware acceleration Product: xorg Version: 7.6 (2010.12) Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium

...used only for displaying. vdpauinfo: vdpauinfo display: :0 screen: 0 API version: 1 Information string: G3DVL VDPAU Driver Shared Library version 1.0 Video surface: name width height types ------------------------------------------- 420 8192 8192 NV12 YV12 422 8192 8192 UYVY YUYV 444 8192 8192 Y8U8V8A8 V8U8Y8A8 Decoder capabilities: name level macbs width height ------------------------------------------- MPEG1 0 16384 2048 2048 MPEG2_SIMPLE 3 16384 2048 2048 MPEG2_MAIN 3 16384 2048 2048 H264_BASELINE 41...

This came out of some debugging I was doing to figure out how BE mode works on this hardware. Among other things, it came out that we're not exposing 16-bpp mode support and that the ARGB8888 mode that we do expose is broken. Also the overlay logic was pretty broken, I must have only tested with very "normal" overlay buffer sizes with modetest before. That said, this code has only

This was all kicked off by me figuring out how the PPC byteswap thing worked. In the end, we're keeping the implicit byteswap based on architecture, but also expose the correctly supported formats, and fix some overlay details. Overlay framebuffers have various funky requirements that should be enforced at framebuffer creation time (these are set apart by their YUV formats). Further, I

This came out of some debugging I was doing to figure out how BE mode works on this hardware. Among other things, it came out that we're not exposing 16-bpp mode support and that the ARGB8888 mode that we do expose is broken. Also the overlay logic was pretty broken, I must have only tested with very "normal" overlay buffer sizes with modetest before. That said, this code has only

Otherwise none of the format checks pass, since the width was still in 16.16 encoding. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- This must have been some sort of last-second cleanup I made and forgot to test, because with this code, there's no way it could ever have worked... drivers/gpu/drm/nouveau/dispnv04/overlay.c | 17 +++++++++-------- 1 file changed, 9

...explicitly wait for bo idle before memcpy buffer move 35b8141 drm/nouveau/ttm: explicity sync with kernel channel before moving buffer 3c57d85 drm/nouveau/ttm: tidy up creation of temporary buffer move vmas ab9b18a drm/nv04/plane: add support for nv04/nv05 video overlay 7ffb078 drm/nv10/plane: add YUYV support a554090 drm/nv50-: map TTM_PL_SYSTEM through a BAR for CPU access ce8f769 drm/nouveau: fix m2mf copy to tiled gart 2e2cfbe drm/nouveau/vm: reduce number of entry-points to vm_map() d0ce7b856 drm/nouveau: make vga_switcheroo code depend on VGA_SWITCHEROO 85b2331 drm: Kill DRM_*MEMORYBARRIER...