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...branch-if-none instructions that jump over > the bodies of conditional regions. > > This technique is described under Runtime Branch Uniformity Optimization > in this paper, though I'm pretty confident it had been in use much longer > than that: > http://www.eecs.berkeley.edu/~yunsup/papers/predication-micro2014.pdf > > -Owen > > On Jan 23, 2015, at 10:29 PM, Jingyue Wu <jingyue at google.com> wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > &g...

*Hi, I am considering a language extension to Clang for optimizing GPU programs. This extension will allow the compiler to use different optimization strategies for divergent and non-divergent branches (to be explained below). We have observed significant performance gain by leveraging this proposed extension, so I want to discuss it here to see how the community likes/dislikes the idea. I will

...ons that jump over >> the bodies of conditional regions. >> >> This technique is described under Runtime Branch Uniformity Optimization >> in this paper, though I'm pretty confident it had been in use much longer >> than that: >> http://www.eecs.berkeley.edu/~yunsup/papers/predication-micro2014.pdf >> >> -Owen >> >> On Jan 23, 2015, at 10:29 PM, Jingyue Wu <jingyue at google.com> wrote: >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> &g...

...ting programs to a single configuration may be a good first step to get things up and running, but ultimately support for runtime-varying vector lengths is desired to make the most of hardware capabilities. [4] "A Case for MVPs: Mixed-Precision Vector Processors", Albert Ou, Quan Nguyen, Yunsup Lee, Krste Asanović, http://hwacha.org/papers/hwacha-mvp-prism2014.pdf ## Producing vector code It is intended that vector code is primarily produced via loop vectorization and other IR-level auto-vectorizers (e.g., the region vectorizer), not written by hand. Supporting loop vectorization is of...

...figuration may be a good first > step to get things up and running, but ultimately support for > runtime-varying vector lengths is desired to make the most of hardware > capabilities. > > [4] "A Case for MVPs: Mixed-Precision Vector Processors", Albert Ou, Quan > Nguyen, Yunsup Lee, Krste Asanović, > http://hwacha.org/papers/hwacha-mvp-prism2014.pdf > > > ## Producing vector code > > It is intended that vector code is primarily produced via loop > vectorization and other IR-level auto-vectorizers (e.g., the region > vectorizer), not written by hand...

...;> first step to get things up and running, but ultimately support for >> runtime-varying vector lengths is desired to make the most of hardware >> capabilities. >> >> [4] "A Case for MVPs: Mixed-Precision Vector Processors", Albert Ou, >> Quan Nguyen, Yunsup Lee, Krste Asanović, >> http://hwacha.org/papers/hwacha-mvp-prism2014.pdf >> >> >> ## Producing vector code >> >> It is intended that vector code is primarily produced via loop >> vectorization and other IR-level auto-vectorizers (e.g., the regi...

...programs to a single configuration may be a good first step to get things up and running, but ultimately support for runtime-varying vector lengths is desired to make the most of hardware capabilities. [4] "A Case for MVPs: Mixed-Precision Vector Processors", Albert Ou, Quan Nguyen, Yunsup Lee, Krste Asanović, http://hwacha.org/papers/hwacha-mvp-prism2014.pdf ## Producing vector code It is intended that vector code is primarily produced via loop vectorization and other IR-level auto-vectorizers (e.g., the region vectorizer), not written by hand. Supporting loop vectori...