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On Jan 9, 2012, at 10:00 AM, Jakob Stoklund Olesen wrote: > > On Jan 8, 2012, at 11:18 PM, Demikhovsky, Elena wrote: > >> I'll explain what we see in the code. >> 1. The caller saves XMM registers across the call if needed (according to DEFS definition). >> YMMs are not in the set, so caller does not take care. > > This is not how the register allocator

...er.corp.intel.com> Content-Type: text/plain; charset="windows-1252" ./llc -mattr=+avx -stack-alignment=16 < basic.ll | grep movaps | grep ymm | grep rbp vmovaps -176(%rbp), %ymm14 vmovaps -144(%rbp), %ymm11 vmovaps -240(%rbp), %ymm13 vmovaps -208(%rbp), %ymm9 vmovaps -272(%rbp), %ymm7 vmovaps -304(%rbp), %ymm0 vmovaps -112(%rbp), %ymm0 vmovaps -80(%rbp), %ymm1 vmovaps -112(%rbp), %ymm0 vmovaps -80(%rbp), %ymm0 vmovaps -176(%rbp), %ymm15 vmovaps -144(%rbp), %ymm0 vmovaps -240(%rbp), %ymm0...

...hSubRegs<"ymm6", [XMM6, XMM6b]>, DwarfRegNum<[23, 27, 27]>; def YMM7: RegisterWithSubRegs<"ymm7", [XMM7, XMM7b]>, DwarfRegNum<[24, 28, 28]>; def YMM8: RegisterWithSubRegs<"ymm8", [XMM8, XMM8b]>, DwarfRegNum<[25, -2, -2]>; def YMM9: RegisterWithSubRegs<"ymm9", [XMM9, XMM9b]>, DwarfRegNum<[26, -2, -2]>; def YMM10: RegisterWithSubRegs<"ymm10", [XMM10, XMM10b]>, DwarfRegNum<[27, -2, -2]>; def YMM11: RegisterWithSubRegs<"ymm11", [XMM11, XMM11b]>, DwarfRegNum<[28...

./llc -mattr=+avx -stack-alignment=16 < basic.ll | grep movaps | grep ymm | grep rbp vmovaps -176(%rbp), %ymm14 vmovaps -144(%rbp), %ymm11 vmovaps -240(%rbp), %ymm13 vmovaps -208(%rbp), %ymm9 vmovaps -272(%rbp), %ymm7 vmovaps -304(%rbp), %ymm0 vmovaps -112(%rbp), %ymm0 vmovaps -80(%rbp), %ymm1 vmovaps -112(%rbp), %ymm0 vmovaps -80(%rbp), %ymm0 vmovaps -176(%rbp), %ymm15 vmovaps -144(%rbp), %ymm0 vmovaps -240(%rbp),...

I'm running in AVX mode, but the stack before call to kernel is aligned to 16 bit. Could you, please, tell me where it should be specified? Thank you. - Elena --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or

...windows-1252" >> >> ./llc -mattr=+avx -stack-alignment=16 < basic.ll | grep movaps | grep >> ymm | grep rbp >> vmovaps -176(%rbp), %ymm14 >> vmovaps -144(%rbp), %ymm11 >> vmovaps -240(%rbp), %ymm13 >> vmovaps -208(%rbp), %ymm9 >> vmovaps -272(%rbp), %ymm7 >> vmovaps -304(%rbp), %ymm0 >> vmovaps -112(%rbp), %ymm0 >> vmovaps -80(%rbp), %ymm1 >> vmovaps -112(%rbp), %ymm0 >> vmovaps -80(%rbp), %ymm0 >> vmovaps -176(%rbp), %ymm15 >&g...

...size:256;offset:499;encoding:vector;format:vector-uint8;set:Floating > Point Registers;gcc:24;dwarf:24;#00 > $qRegisterInfo63#ab > $name:ymm8;bitsize:256;offset:531;encoding:vector;format:vector-uint8;set:Floating > Point Registers;gcc:25;dwarf:25;#00 > $qRegisterInfo64#ac > $name:ymm9;bitsize:256;offset:563;encoding:vector;format:vector-uint8;set:Floating > Point Registers;gcc:26;dwarf:26;#00 > $qRegisterInfo65#ad > $name:ymm10;bitsize:256;offset:595;encoding:vector;format:vector-uint8;set:Floating > Point Registers;gcc:27;dwarf:27;#00 > $qRegisterInfo66#ae > $...

Thank you, Clayton. This is very helpful. We use the LLDB specific GDB remote extensions, and our debugger server supports "qRegisterInfo" package. "reg 0x3c" is the frame pointer. In the example mentioned above, we have SP = FP - 40 for current call frame. And variable "a" is stored at address (FP + -24) from asm instruction [FP + -24] = R3;; Thus we can conclude