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> The C5x and C6x output diverges in build 10143, which has log message "lpc > floor converted to fixed-point." Also, the measured SNR changed from 11.05 > in builds 9854-10141 to 9.22 and 9.24 in 10143. Actually, build 10143 introduced another bug, that was the reason for the 1.1.11.1 release. > There is just four lines in modes.c which declare the constant, and one

...DSP results match what you get on a PC? > >Does the C55 have a 32x16 multiplier or do you mean it handles my > >emulation of it well? > > I has two ALUs with 17x17 bit MACs, and it has an instruction that does > this: > ACy = M40(rnd((ACx >> #16) + (uns(Xmem) * uns(Ymem)))) > > I never quite understood this, so I went of and looked at the manuals. It > can multiply the low half in one cycle, then shift and add it to the high > half in a second cycle. And, in a type loop the parallel ALUs would allow > one 32x16 multiply per cycle. Just one th...

...multiplies, so I have not played with PRECISION16 since last year. > >Does the C55 have a 32x16 multiplier or do you mean it handles my >emulation of it well? I has two ALUs with 17x17 bit MACs, and it has an instruction that does this: ACy = M40(rnd((ACx >> #16) + (uns(Xmem) * uns(Ymem)))) I never quite understood this, so I went of and looked at the manuals. It can multiply the low half in one cycle, then shift and add it to the high half in a second cycle. And, in a type loop the parallel ALUs would allow one 32x16 multiply per cycle. The C54x cannot do this, and uses li...

...not any time soon. >> >Does the C55 have a 32x16 multiplier or do you mean it handles my >> >emulation of it well? >> >> I has two ALUs with 17x17 bit MACs, and it has an instruction that does >> this: >> ACy = M40(rnd((ACx >> #16) + (uns(Xmem) * uns(Ymem)))) >> >> I never quite understood this, so I went of and looked at the manuals. >> It >> can multiply the low half in one cycle, then shift and add it to the high >> half in a second cycle. And, in a type loop the parallel ALUs would >> allow >> one 32x...