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2008/12/28 Keun Soo Yim <yim6 at illinois.edu> > This is a simple question about building ARM cross-compiler. > What is the building procedure using LLVM 2.4 and GCC front-end 4.2? > > I used these commands for LLVM, and it is okay. > > $ ../configure --prefix=/usr/local -target=arm > $ make ENABLE...

Hi, The source attached at the bottom is a testcase which causes a back-end error in LLVM 2.4. These types of assembly routines are mainly used in OS kernels. I checked that GCC 4.3 works for this routine. The error messsage is ... Couldn't allocate output reg for constraint 'A'! I just need help or comments so that I could analyze and fix this bug. My

Hi, This is a simple question about building ARM cross-compiler. What is the building procedure using LLVM 2.4 and GCC front-end 4.2? I used these commands for LLVM, and it is okay. $ ../configure --prefix=/usr/local -target=arm $ make ENABLE_OPTIMIZED=0 $ make ENABLE_OPTIMIZED=0 install Then these commands were used for GCC front-end but this got couple of errors. $ ../configure

Mark Kromis wrote: > On Dec 27, 2008, at 7:41 PM, Misha Brukman wrote: >> 2008/12/27 Mark Kromis <greybird at mac.com> >> Just a curiosity question, why push for gtest vs Boost Test or a >> different test suite? >> I normally use Boost, and their test suite, so I'm more familiar with >> that. So I was wondering is one better then the other, or is it

Does anyone succeed at compiling Linux kernel for Sparc v8 architecture? I am currently trying to expand the regime of LLVM to Sparc kernel codes. The following is the initial error messages. Any comment is welcomed. #1. Inline Assembly Code: register struct thread_info *current_thread_info_reg asm("g6"); Error Message: include/asm/thread_info.h:77: error:

Please run. $ llvm-gcc -O3 -emit-llvm hello.c -c -o hello.bc $ llvm-dis < hello.bc > hello.ll The first command is to generate a byte code and second is to translate the bytecode to a readable form. Thanks! From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Alex.Wang Sent: Wednesday, December 24, 2008 10:31 PM To: llvmdev at

Hi, I have couple of questions that those who design unconventional passes would be interested in. 1. How to move a virtual register data to another new virtual register? It seems like that there is no LLVM instruction similar to mov machine instruction. Arithmetic or logical operators could be used for integer variables but what about pointer variables? 2. What is

Currently I have a trick to extract the correlation information of LLVA and ISA. By adding an intrinsic instruction and comparing the emitted binary with the original one. The location of machine instruction that I am interested in is calculated relative to the intrinsic instruction. Unless I change the original instruction with the intrinsic having a same size, this needs many iterations as much

Does anyone succeed at compiling Linux kernel for Sparc v8 architecture? I am currently trying to expand the regime of LLVM to Sparc kernel codes. The following is the initial error messages. Any comment is welcomed. #1. Inline Assembly Code: register struct thread_info *current_thread_info_reg asm("g6"); Error Message: include/asm/thread_info.h:77: error:

Hi, How to correlate the LLVM IR-leve instructions and memory values with the machine instructions and memory locations? For example, if CMP instruction in machine ISA is selected for the ICMP instruction in LLVA, with the Instruction datastructure for ICMP, is it possible to get the memory address of CMP instruction? Assume that the code segment base address is given. Similarly, by

On 2008-09-29 07:46, Keun Soo Yim wrote: > Does anyone succeed at compiling Linux kernel for Sparc v8 architecture? > I am currently trying to expand the regime of LLVM to Sparc kernel codes. > The following is the initial error messages. Any comment is welcomed. > > #1. Inline Assembly > > > > Code: > > register struct thread_info