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> -----Original Message----- > From: linux-pci-owner at vger.kernel.org [mailto:linux-pci-owner at vger.kernel.org] > On Behalf Of Yijing Wang > Sent: Wednesday, August 20, 2014 11:59 AM > To: Bhushan Bharat-R65777; Basu Arnab-B45036 > Cc: Xinwei Hu; Wuyun; Bjorn Helgaas; linux-pci at vger.kernel.org; > Paul.Mundt at huawei.com; James E.J. Bottomley; Marc Zyngier; linux-arm-

> -----Original Message----- > From: linux-pci-owner at vger.kernel.org [mailto:linux-pci-owner at vger.kernel.org] > On Behalf Of Yijing Wang > Sent: Wednesday, August 20, 2014 11:59 AM > To: Bhushan Bharat-R65777; Basu Arnab-B45036 > Cc: Xinwei Hu; Wuyun; Bjorn Helgaas; linux-pci at vger.kernel.org; > Paul.Mundt at huawei.com; James E.J. Bottomley; Marc Zyngier; linux-arm-

Hi Yijing > -----Original Message----- > From: linux-pci-owner at vger.kernel.org [mailto:linux-pci-owner at vger.kernel.org] > On Behalf Of Yijing Wang > Sent: Monday, August 04, 2014 8:34 AM > To: Basu Arnab-B45036 > Cc: Xinwei Hu; Wuyun; Bjorn Helgaas; linux-pci at vger.kernel.org; > Paul.Mundt at huawei.com; James E.J. Bottomley; Marc Zyngier; linux-arm- > kernel at

Hi Yijing > -----Original Message----- > From: linux-pci-owner at vger.kernel.org [mailto:linux-pci-owner at vger.kernel.org] > On Behalf Of Yijing Wang > Sent: Monday, August 04, 2014 8:34 AM > To: Basu Arnab-B45036 > Cc: Xinwei Hu; Wuyun; Bjorn Helgaas; linux-pci at vger.kernel.org; > Paul.Mundt at huawei.com; James E.J. Bottomley; Marc Zyngier; linux-arm- > kernel at

On Fri, Jul 25, 2014 at 10:08 PM, Yijing Wang <wangyijing at huawei.com> wrote: > Pci_dev_msi_enabled() is used to check whether device > MSI/MSIX enabled. Refactor this function to suuport > checking only device MSI or MSIX enabled. > > Signed-off-by: Yijing Wang <wangyijing at huawei.com> So this patch refactors things so that checks like this: > - if

On Fri, Jul 25, 2014 at 10:08 PM, Yijing Wang <wangyijing at huawei.com> wrote: > Pci_dev_msi_enabled() is used to check whether device > MSI/MSIX enabled. Refactor this function to suuport > checking only device MSI or MSIX enabled. > > Signed-off-by: Yijing Wang <wangyijing at huawei.com> So this patch refactors things so that checks like this: > - if

Hi Yijing > -----Original Message----- > From: Yijing Wang [mailto:wangyijing at huawei.com] > Sent: Saturday, July 26, 2014 8:39 AM > To: linux-kernel at vger.kernel.org > Cc: Xinwei Hu; Wuyun; Bjorn Helgaas; linux-pci at vger.kernel.org; > Paul.Mundt at huawei.com; James E.J. Bottomley; Marc Zyngier; linux-arm- > kernel at lists.infradead.org; Russell King; linux-arch at

Hi Yijing > -----Original Message----- > From: Yijing Wang [mailto:wangyijing at huawei.com] > Sent: Saturday, July 26, 2014 8:39 AM > To: linux-kernel at vger.kernel.org > Cc: Xinwei Hu; Wuyun; Bjorn Helgaas; linux-pci at vger.kernel.org; > Paul.Mundt at huawei.com; James E.J. Bottomley; Marc Zyngier; linux-arm- > kernel at lists.infradead.org; Russell King; linux-arch at

I am booting a kernel with CONFIG_ACPI=n on a platform which does not support ACPI. -Brian On Fri, Jul 4, 2014 at 1:59 AM, Yijing Wang <wangyijing at huawei.com> wrote: >>>> There is a NVIDIA G96 GPU (which is PCIe only) hanging off of a PCIe >>>> <-> PCI bridge (all on one card), which is plugged into a motherboard >>>> with the 430FX chipset (PCI

>> The key difference between PCI device and Non-PCI MSI is the interfaces to >> access hardware MSI registers. >> for instance, currently, msi_chip->setup_irq() to setup MSI irq and configure >> the MSI address/data registers, so we need to provide device specific >> write_msi_msg() interface, then when we call msi_chip->setup_irq(), the device >> MSI

On Thu, Jul 3, 2014 at 11:09 PM, Yijing Wang <wangyijing at huawei.com> wrote: > On 2014/7/4 10:43, Ilia Mirkin wrote: >> On Thu, Jul 3, 2014 at 10:35 PM, Yijing Wang <wangyijing at huawei.com> wrote: >>> Hi Brian, >>> From your 01:00.0 VGA compatible controller PCI config register, it supports 1 MSI vector, so I think this >>> card has no

On Wednesday 30 July 2014, Yijing Wang wrote: > >>> > >>> The other part I'm not completely sure about is how you want to > >>> have MSIs map into normal IRQ descriptors. At the moment, all > >>> MSI users are based on IRQ numbers, but this has known scalability problems. > >> > >> Hmmm, I still use the IRQ number to map the

On Wednesday 30 July 2014, Yijing Wang wrote: > >>> > >>> The other part I'm not completely sure about is how you want to > >>> have MSIs map into normal IRQ descriptors. At the moment, all > >>> MSI users are based on IRQ numbers, but this has known scalability problems. > >> > >> Hmmm, I still use the IRQ number to map the

On 2014/7/4 14:26, Brian Becker wrote: > I am booting a kernel with CONFIG_ACPI=n on a platform which does not > support ACPI. Hmmm, so my suggestion is 1. Add quirk to detect 430FX chipset, if detected, disable MSI in this platform. or 2. Append boot argument pci=nomsi in OS command line when the OS running on your old platform. Maybe other guys has some advices. :) > > On

On 2014/8/1 21:16, Arnd Bergmann wrote: > On Wednesday 30 July 2014, Yijing Wang wrote: >>>>> >>>>> The other part I'm not completely sure about is how you want to >>>>> have MSIs map into normal IRQ descriptors. At the moment, all >>>>> MSI users are based on IRQ numbers, but this has known scalability problems. >>>>

On 2014/7/29 22:08, Arnd Bergmann wrote: > On Saturday 26 July 2014 11:08:37 Yijing Wang wrote: >> The series is a draft of generic MSI driver that supports PCI >> and Non-PCI device which have MSI capability. If you're not interested >> it, sorry for the noise. > > I've finally managed to take some time to look at the series. Overall, > the concept

On 2014/7/29 22:08, Arnd Bergmann wrote: > On Saturday 26 July 2014 11:08:37 Yijing Wang wrote: >> The series is a draft of generic MSI driver that supports PCI >> and Non-PCI device which have MSI capability. If you're not interested >> it, sorry for the noise. > > I've finally managed to take some time to look at the series. Overall, > the concept

On Monday 04 August 2014, Yijing Wang wrote: > I have another question is some drivers will request more than one > MSI/MSI-X IRQ, and the driver will use them to process different things. > Eg. network driver generally uses one of them to process trivial network thins, > and others to transmit/receive data. > > So, in this case, it seems to driver need to touch the IRQ numbers.

On Monday 04 August 2014, Yijing Wang wrote: > I have another question is some drivers will request more than one > MSI/MSI-X IRQ, and the driver will use them to process different things. > Eg. network driver generally uses one of them to process trivial network thins, > and others to transmit/receive data. > > So, in this case, it seems to driver need to touch the IRQ numbers.

On 2014/7/4 11:30, Ilia Mirkin wrote: > On Thu, Jul 3, 2014 at 11:09 PM, Yijing Wang <wangyijing at huawei.com> wrote: >> On 2014/7/4 10:43, Ilia Mirkin wrote: >>> On Thu, Jul 3, 2014 at 10:35 PM, Yijing Wang <wangyijing at huawei.com> wrote: >>>> Hi Brian, >>>> From your 01:00.0 VGA compatible controller PCI config register, it supports 1