search for: yevgeni

It seems relevant to point out there have been several efforts over the years to solve this problem by eliminating the static initializers in LLVM and migrate cl::opts to storing their values in a context object. One of those efforts was made by me back in 2014 (see https://reviews.llvm.org/D6207 <https://reviews.llvm.org/D6207>). One of the perennial problems with cl::opt is that many of

So... looking at OptBisect, I have a few thoughts: 1) what's the purpose of the virtual interface/OptPassGate? I'm guessing maybe that worked around the circular referencing in these APIs? hmm, no, I suppose that wouldn't work/be relevant here. 2) Why is OptBisector a ManagedStatic? That seems pretty antithetical to the role of LLVMContext. When/why would a user be bisecting over

Andrew, I would not make the caller pass the description of the IR unit. That is because it would result in the description generated every time even if OptBisect is disabled. Description generation is not very chip. Thinking on the OptBisect extension, I believe passing the units are the right choice because OptPassGates may use them to make pass skipping decisions. -Yevgeny Rouban

& now looking back at the patch-in-progress, I see it allows setting the OptBisector/OptPassGate as suggested in (2). If that becomes the /only/ option (ie: LLVMContext has no default OptPassGate) then the virtual interface could be kept down in IR (though it's still a bit questionable to have those Analysis types (Loop, Region, CallGraphSCC) even declared in IR). Then the implementation

On 03/30/2018 12:05 AM, David Blaikie via llvm-dev wrote: > & now looking back at the patch-in-progress, I see it allows setting the OptBisector/OptPassGate as suggested in (2). Well, the patch currently discussed does not attempt to solve the passgate object management issue. It is left for the discretion of passgate object provider. > > If that becomes the /only/ option (ie:

On Mon, Apr 2, 2018 at 11:32 PM Fedor Sergeev via llvm-dev < llvm-dev at lists.llvm.org> wrote: > On 03/30/2018 12:05 AM, David Blaikie via llvm-dev wrote: > > & now looking back at the patch-in-progress, I see it allows setting > the OptBisector/OptPassGate as suggested in (2). > Well, the patch currently discussed does not attempt to solve the > passgate object

Hello, I am not finding how to read SSL keys/certificates from database. Is this possible? Or only file reads allowed? -- Regards, Yevgeny

> Pass Manager (PassManager.h) itself, does not - it's only templates, none of it depends on Region, Loop, etc. Well, true but the problem happens when you try to instantiate the thing. And for generic features like opt-bisection, ir-print-after-all etc that want:   - to have a say before/on/after every execution of every pass   - have a shared implementation of the main logic you have

On Tue, Apr 3, 2018 at 8:50 AM Fedor Sergeev <fedor.sergeev at azul.com> wrote: > > Pass Manager (PassManager.h) itself, does not - it's only templates, > none of it depends on Region, Loop, etc. > Well, true but the problem happens when you try to instantiate the thing. > And for generic features like opt-bisection, ir-print-after-all etc that > want: > - to

Hello, I am getting strange messages on logs and I cannot find any reason. Could someone point me on what's wrong with my dovecot configuration? ~# dovecot -n # 2.3.4.1 (f79e8e7e4): /etc/dovecot/dovecot.conf # Pigeonhole version 0.5.4 () # OS: Linux 4.9.0-8-amd64 x86_64 Debian 9 ext4 ~# grep 'full mail' //var/log/dovecot.log Apr 16 19:25:43 imap(phaoost at

David, we definitely need to address this issue and I did not forget about it. I'm still fleshing out a proposal on a generic solution for "pass execution control points", which was inspired by the new pass manager needs but then it appears we can largerly reuse the implementation for both managers. Since the implementation should be based on a special Analysis, it definitely

Ping on this - any chance we can look at fixing the OptBisect layering here/now? Could we move the implementation into Analysis & require users to set it, rather than having it as a default value in IR? On Tue, Apr 3, 2018 at 9:25 AM David Blaikie <dblaikie at gmail.com> wrote: > On Tue, Apr 3, 2018 at 8:50 AM Fedor Sergeev <fedor.sergeev at azul.com> > wrote: >

Hi, I get a trouble using nut with PowerMan Back Pro N 1400 Plus ~# /lib/nut/megatec -DDDDD -a pman Network UPS Tools - Megatec protocol driver 1.6 (2.4.1) send_to_all: SETINFO driver.parameter.port "/dev/ttyS0" debug level is '5' DTR=1, RTS=0 Starting UPS detection process... Asking for UPS information [I]... I => OK [# PCSTAR-PRO V1.02-2411] I VALUES => [

...;yanmin_zhang@linux.intel.com> Yannick Fertre <yannick.fertre@stericsson.com> Yashpal Dutta <yashpal.dutta@freescale.com> Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com> Yegor Yefremov <yegorslists@googlemail.com> Yehuda Yitschak <yehuday@marvell.com> Yevgeniy Melnichuk <yevgeniy.melnichuk@googlemail.com> Yevgeny Petrilin <yevgenyp@mellanox.co.il> Yevgeny Petrilin <yevgenyp@mellanox.com> Yi Zhang <yizhang@marvell.com> Yi Zou <yi.zou@intel.com> Yijing Wang <wangyijing@huawei.com> Yilu Mao <ylmao@marvell....

...;yanmin_zhang@linux.intel.com> Yannick Fertre <yannick.fertre@stericsson.com> Yashpal Dutta <yashpal.dutta@freescale.com> Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com> Yegor Yefremov <yegorslists@googlemail.com> Yehuda Yitschak <yehuday@marvell.com> Yevgeniy Melnichuk <yevgeniy.melnichuk@googlemail.com> Yevgeny Petrilin <yevgenyp@mellanox.co.il> Yevgeny Petrilin <yevgenyp@mellanox.com> Yi Zhang <yizhang@marvell.com> Yi Zou <yi.zou@intel.com> Yijing Wang <wangyijing@huawei.com> Yilu Mao <ylmao@marvell....

...;yanmin_zhang@linux.intel.com> Yannick Fertre <yannick.fertre@stericsson.com> Yashpal Dutta <yashpal.dutta@freescale.com> Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com> Yegor Yefremov <yegorslists@googlemail.com> Yehuda Yitschak <yehuday@marvell.com> Yevgeniy Melnichuk <yevgeniy.melnichuk@googlemail.com> Yevgeny Petrilin <yevgenyp@mellanox.co.il> Yevgeny Petrilin <yevgenyp@mellanox.com> Yi Zhang <yizhang@marvell.com> Yi Zou <yi.zou@intel.com> Yijing Wang <wangyijing@huawei.com> Yilu Mao <ylmao@marvell....

...Yannick Fertre <yannick.fertre@stericsson.com> Yashpal Dutta <yashpal.dutta@freescale.com> Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com> Yegor Yefremov <yegorslists@googlemail.com> Yehuda Yitschak <yehuday@marvell.com> Yen Lin <yelin@nvidia.com> Yevgeniy Melnichuk <yevgeniy.melnichuk@googlemail.com> Yevgeny Petrilin <yevgenyp@mellanox.co.il> Yevgeny Petrilin <yevgenyp@mellanox.com> Yi Zhang <yizhang@marvell.com> Yi Zou <yi.zou@intel.com> Yijing Wang <wangyijing@huawei.com> Yilu Mao <ylmao@marvell....

...Yannick Fertre <yannick.fertre@stericsson.com> Yashpal Dutta <yashpal.dutta@freescale.com> Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com> Yegor Yefremov <yegorslists@googlemail.com> Yehuda Yitschak <yehuday@marvell.com> Yen Lin <yelin@nvidia.com> Yevgeniy Melnichuk <yevgeniy.melnichuk@googlemail.com> Yevgeny Petrilin <yevgenyp@mellanox.co.il> Yevgeny Petrilin <yevgenyp@mellanox.com> Yi Zhang <yizhang@marvell.com> Yi Zou <yi.zou@intel.com> Yijing Wang <wangyijing@huawei.com> Yilu Mao <ylmao@marvell....

...Yannick Fertre <yannick.fertre@stericsson.com> Yashpal Dutta <yashpal.dutta@freescale.com> Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com> Yegor Yefremov <yegorslists@googlemail.com> Yehuda Yitschak <yehuday@marvell.com> Yen Lin <yelin@nvidia.com> Yevgeniy Melnichuk <yevgeniy.melnichuk@googlemail.com> Yevgeny Petrilin <yevgenyp@mellanox.co.il> Yevgeny Petrilin <yevgenyp@mellanox.com> Yi Zhang <yizhang@marvell.com> Yi Zou <yi.zou@intel.com> Yijing Wang <wangyijing@huawei.com> Yilu Mao <ylmao@marvell....

...Yannick Fertre <yannick.fertre@stericsson.com> Yashpal Dutta <yashpal.dutta@freescale.com> Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com> Yegor Yefremov <yegorslists@googlemail.com> Yehuda Yitschak <yehuday@marvell.com> Yen Lin <yelin@nvidia.com> Yevgeniy Melnichuk <yevgeniy.melnichuk@googlemail.com> Yevgeny Petrilin <yevgenyp@mellanox.co.il> Yevgeny Petrilin <yevgenyp@mellanox.com> Yi Zhang <yizhang@marvell.com> Yi Zou <yi.zou@intel.com> Yijing Wang <wangyijing@huawei.com> Yilu Mao <ylmao@marvell....