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Displaying 2 results from an estimated 2 matches for "ybs5rhvn".

2013 Feb 19
0
[LLVMdev] Auto-vectorization and phi nodes
...hi float* [ %a, %Top ], [ %a.next, %Loop ] LV: Can't vectorize the instructions or CFG LV: Not vectorizing. Should indvars have changed this phi node into something else earlier during optimization? In case I missed something important from the log, I put it all up here: http://pastebin.com/yBS5RhVN The IR fed into opt is at the end of the log, functionally unchanged. My command line is opt -S -O3 -vectorize-loops -force-vector-width=8 -debug Thanks again! Vesa 19.2.2013 19:22, Nadav Rotem kirjoitti: > Hi Vesa, > > The pass IndVars changes the induction variables to allow SCEV to...
2013 Feb 19
2
[LLVMdev] Auto-vectorization and phi nodes
Hi Vesa, The pass IndVars changes the induction variables to allow SCEV to analyze them and enable other optimizations. This is the canonicalization phase. Later on, LSR lowers the canonicalized induction variables to induction variables that map nicely to the target's addressing modes. In many cases it can remove some of the induction variables. I suspect that the loop vectorizer does