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...haps caused by 'slips' in the interface/timing system onboard the card?) - Coding errors in the MMX vs. non-MMX routines - Fundemental differences between the audio signals being passed to the customers depending on the service providers facilities (eg. variations in level padding: http://yarchive.net/phone/digital_pads.html) Of all of these, I remain convinced that in most cases the real issue is something like the last. Namely that subtle differences between facilities are interfering with the assumptions the mathmatics in mec2 use - it's a very rigid model and makes use a number of...

...PUs (unlike an LL, which does so in some implementations, but not all). So, the problem with indefinite cacheline ping-pong can be introduced by the extra spill in the loop -- even when it appears that it doesn't cause a problem on your processor. Here's a relevant set of emails <http://yarchive.net/comp/linux/cmpxchg_ll_sc_portability.html> from Linus, also discussing why it's not possible to reliably expose LL/SC intrinsics to C code -- which is the same problems it's not possible to reliably expose them to LLVM IR. The MIPS IV manual is nicely specific in its documentation...