search for: xzalloc

Displaying 8 results from an estimated 8 matches for "xzalloc".

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2017 Mar 06
2
Suspicious code in net_socket.c
Good afternoon! Module - net_socket.c Function - get_known_addresses --------------------------------------------------- struct addrinfo *nai = xzalloc(sizeof *nai); if(ai) ai->ai_next = nai; ai = nai; -------------------------------------------------- For my opinion, possible causes: 1. Lost trails (ai_next) 2. ai_next not initialized 3. Possible segfault during "freeaddrinfo" call in do_outgoing_connections May be I don'...
2011 Oct 14
1
[PATCH] cpufreq: error path fixes
...ailure and hence the governor not getting cleared is benign). Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/drivers/cpufreq/cpufreq.c +++ b/xen/drivers/cpufreq/cpufreq.c @@ -176,8 +176,10 @@ int cpufreq_add_cpu(unsigned int cpu) if (!domexist || hw_all) { policy = xzalloc(struct cpufreq_policy); - if (!policy) + if (!policy) { ret = -ENOMEM; + goto err0; + } policy->cpu = cpu; per_cpu(cpufreq_cpu_policy, cpu) = policy; @@ -186,7 +188,7 @@ int cpufreq_add_cpu(unsigned int cpu) if (ret) {...
2017 Mar 07
0
Suspicious code in net_socket.c
On Mon, Mar 06, 2017 at 01:00:45PM +0300, Roman S wrote: > Module - net_socket.c > Function - get_known_addresses > --------------------------------------------------- > struct addrinfo *nai = xzalloc(sizeof *nai); > if(ai) > ai->ai_next = nai; > ai = nai; > -------------------------------------------------- > For my opinion, possible causes: > 1. Lost trails (ai_next) > 2. ai_next not initialized > 3. Possible segfault during "freeaddrinfo" call in do...
2017 Mar 08
1
Suspicious code in net_socket.c
...7, 2017 9:24 PM To: tinc-devel at tinc-vpn.org Subject: Re: Suspicious code in net_socket.c On Mon, Mar 06, 2017 at 01:00:45PM +0300, Roman S wrote: > Module - net_socket.c > Function - get_known_addresses > --------------------------------------------------- > struct addrinfo *nai = xzalloc(sizeof *nai); > if(ai) > ai->ai_next = nai; > ai = nai; > -------------------------------------------------- > For my opinion, possible causes: > 1. Lost trails (ai_next) > 2. ai_next not initialized > 3. Possible segfault during "freeaddrinfo" call in &g...
2013 Aug 16
7
[PATCH v2] xen/console: buffer and show origin of guest PV writes
...omain.pbuf_lock); spin_lock_init(&d->arch.hvm_domain.irq_lock); spin_lock_init(&d->arch.hvm_domain.uc_lock); INIT_LIST_HEAD(&d->arch.hvm_domain.msixtbl_list); spin_lock_init(&d->arch.hvm_domain.msixtbl_list_lock); - d->arch.hvm_domain.pbuf = xzalloc_array(char, HVM_PBUF_SIZE); d->arch.hvm_domain.params = xzalloc_array(uint64_t, HVM_NR_PARAMS); d->arch.hvm_domain.io_handler = xmalloc(struct hvm_io_handler); rc = -ENOMEM; - if ( !d->arch.hvm_domain.pbuf || !d->arch.hvm_domain.params || - !d->arch.hvm_doma...
2013 Sep 09
0
[PATCH v3] xen/console: buffer and show origin of guest PV writes
...omain.pbuf_lock); spin_lock_init(&d->arch.hvm_domain.irq_lock); spin_lock_init(&d->arch.hvm_domain.uc_lock); INIT_LIST_HEAD(&d->arch.hvm_domain.msixtbl_list); spin_lock_init(&d->arch.hvm_domain.msixtbl_list_lock); - d->arch.hvm_domain.pbuf = xzalloc_array(char, HVM_PBUF_SIZE); d->arch.hvm_domain.params = xzalloc_array(uint64_t, HVM_NR_PARAMS); d->arch.hvm_domain.io_handler = xmalloc(struct hvm_io_handler); rc = -ENOMEM; - if ( !d->arch.hvm_domain.pbuf || !d->arch.hvm_domain.params || - !d->arch.hvm_doma...
2013 Jan 21
6
[PATCH v3 0/4] nested vmx: enable VMCS shadowing feature
Changes from v2 to v3: - Use pfn_to_paddr() to get the address from frame number instead of doing shift directly. - Remove some unnecessary initialization code and add "static" to vmentry_fields and gpdptr_fields. - Enable the VMREAD/VMWRITE bitmap only if nested hvm is enabled. - Use clear_page() to set all 0 to the page instead of memset(). - Use domheap to allocate the
2012 Dec 10
26
[PATCH 00/11] Add virtual EPT support Xen.
From: Zhang Xiantao <xiantao.zhang@intel.com> With virtual EPT support, L1 hyerpvisor can use EPT hardware for L2 guest''s memory virtualization. In this way, L2 guest''s performance can be improved sharply. According to our testing, some benchmarks can show > 5x performance gain. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Zhang Xiantao (11):