Displaying 3 results from an estimated 3 matches for "xxxsubtarget".
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x86subtarget
2017 Feb 25
2
Help understanding and lowering LLVM IDS conditional codes correctly
...n return false
fcmp.ne --> ordered not equal, if any input NaN then return true
fcmp.ge --> ordered grater equal, if any input NaN then return false
When FPU is not present I need to generate a library call,
so I have added following code in LowerBR_CC function in XXXISelLowering.cpp
const XXXSubtarget &STI = static_cast<const XXXSubtarget&>
(DAG.getSubtarget());
XXXCC::CondCodes TCC;
getFPCCtoXXCC(CC,TCC);
TargetCC = DAG.getConstant(TCC, dl, MVT::i8);
if (STI.useHardFloat()) {
// if fcmp instruction is available use it
SDValue...
2017 Mar 09
2
Help understanding and lowering LLVM IDS conditional codes correctly
...not equal, if any input NaN then return true
> fcmp.ge --> ordered grater equal, if any input NaN then return false
>
> When FPU is not present I need to generate a library call,
>
> so I have added following code in LowerBR_CC function in
> XXXISelLowering.cpp
>
> const XXXSubtarget &STI = static_cast<const XXXSubtarget&>
> (DAG.getSubtarget());
> XXXCC::CondCodes TCC;
> getFPCCtoXXCC(CC,TCC);
> TargetCC = DAG.getConstant(TCC, dl, MVT::i8);
> if (STI.useHardFloat()) {
> // if fcmp instruction...
2017 Mar 14
2
Help understanding and lowering LLVM IDS conditional codes correctly
...ter equal, if any
>> input NaN then return false
>>
>> When FPU is not present I need to generate a library call,
>>
>> so I have added following code in LowerBR_CC function in
>> XXXISelLowering.cpp
>>
>> const XXXSubtarget &STI = static_cast<const XXXSubtarget&>
>> (DAG.getSubtarget());
>> XXXCC::CondCodes TCC;
>> getFPCCtoXXCC(CC,TCC);
>> TargetCC = DAG.getConstant(TCC, dl, MVT::i8);
>> if (STI.useHardFloat()) {
>&g...