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...t; syntax that would allow matching *any* opcode (or even some subset), not just MUL, with a FNEG'd operand? I expect I can define a PatFrag: def fneg_su : PatFrag<(ops node:$val), (fneg node:$val), [{ return N->hasOneUse(); }]>; and then use that in each target instruction patten in XXXInstrInfo.td, such as: def XXX_MUL : XXXInst< (outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2), "mul $dst, -$src1, $src2", [(set $dst, (mul (fneg_su GPR32:$src1), GPR32:$src2))]>; but I would like to believe there's a way to do this with a Pattern<> definition in...

...es: https://reviews.llvm.org/D81580 - Usage: https://reviews.llvm.org/differential/changeset/?ref=2005337&whitespace=ignore-most - Example of rewrite: https://reviews.llvm.org/D81662 *CONTEXT* There are places in LLVM where we need to pack typed fields into opaque values. For instance, the `XXXInst` classes in `llvm/include/llvm/IR/Instructions.h` that extract information from `Value::SubclassData` via `getSubclassDataFromInstruction()`. The bit twiddling is done manually: this impairs readability and prevent consistent handling of out of range values (e.g. https://github.com/llvm/llvm-projec...

...his scope* */home/arnie/llvm-svn/llvm/include/llvm/Instruction.def:105:1: error: ‘visitYYY’ was not declared in this scope* But part of my Instruction.def looks like this (after inserting XXX and YYY)- . ....... HANDLE_TERM_INST ( 7, Unreachable, UnreachableInst) HANDLE_TERM_INST ( 8, XXX , XXXInst) HANDLE_TERM_INST ( 9, YYY , YYYInst) LAST_TERM_INST ( 9) ....... Can anybody guess what may be the reason of this error? Did I miss any files that need to be modified. Below are the list of files I modified to add new LLVM IR instruction. llvm/include/llvm/Instruction.def llvm/include/ll...

...l), [{ return > N->hasOneUse(); }]>; AFAIK, you don't need to verify for hasOneUse() because the instruction selector will do it for you. Also, it's too restrictive if fneg_su is used alone in some other matching rule. > and then use that in each target instruction patten in XXXInstrInfo.td, such as: > > def XXX_MUL : XXXInst< > (outs GPR32:$dst), > (ins GPR32:$src1, GPR32:$src2), > "mul $dst, -$src1, $src2", > [(set $dst, (mul (fneg_su GPR32:$src1), GPR32:$src2))]>; > > but I would like to believe there's a way to do...

....llvm.org/differential/changeset/?ref=2005337&whitespace=ignore-most >> - Example of rewrite: https://reviews.llvm.org/D81662 >> >> *CONTEXT* >> There are places in LLVM where we need to pack typed fields into opaque >> values. >> >> For instance, the `XXXInst` classes in >> `llvm/include/llvm/IR/Instructions.h` that extract information from >> `Value::SubclassData` via `getSubclassDataFromInstruction()`. >> The bit twiddling is done manually: this impairs readability and prevent >> consistent handling of out of range values (e.g....