Displaying 2 results from an estimated 2 matches for "xstg_intrinsic".
2016 Aug 22
3
Instruction itineraries and fence/barrier instructions
We improved our instruction itineraries and now we're seeing our testcases
for fence instructions break.
For example, we have this testcase:
@write_me = external global i32
@read_me = external global i32
; Function Attrs: nounwind
define i32 @xstg_intrinsic(i32 %foo) #0 {
entry:
; CHECK: store r0, r1, 0, 32
; CHECK-NEXT: fence 2
%foo.addr = alloca i32, align 4
store i32 %foo, i32* %foo.addr, align 4
%0 = load i32* %foo.addr, align 4
store volatile i32 %0, i32* @write_me, align 4
call void @llvm.xstg.memory.barrier(i32 2, i8 0)
%1 =...
2016 Aug 22
2
Instruction itineraries and fence/barrier instructions
...eraries and now we're seeing our
> testcases for fence instructions break.
> >
> > For example, we have this testcase:
> >
> > @write_me = external global i32
> > @read_me = external global i32
> >
> > ; Function Attrs: nounwind
> > define i32 @xstg_intrinsic(i32 %foo) #0 {
> > entry:
> > ; CHECK: store r0, r1, 0, 32
> > ; CHECK-NEXT: fence 2
> > %foo.addr = alloca i32, align 4
> > store i32 %foo, i32* %foo.addr, align 4
> > %0 = load i32* %foo.addr, align 4
> > store volatile i32 %0, i32* @write_...