Displaying 3 results from an estimated 3 matches for "xstate_lwp".
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xstate_fp
2013 Nov 19
6
[PATCH 2/5] X86 architecture instruction set extension definiation
...efine XSTATE_SSE (1ULL << 1)
#define XSTATE_YMM (1ULL << 2)
+#define XSTATE_BNDREGS (1ULL << 3)
+#define XSTATE_BNDCSR (1ULL << 4)
+#define XSTATE_OPMASK (1ULL << 5)
+#define XSTATE_ZMM (1ULL << 6)
+#define XSTATE_HI_ZMM (1ULL << 7)
#define XSTATE_LWP (1ULL << 62) /* AMD lightweight profiling */
#define XSTATE_FP_SSE (XSTATE_FP | XSTATE_SSE)
-#define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE | XSTATE_YMM | XSTATE_LWP)
+#define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE | XSTATE_YMM | XSTATE_OPMASK | \
+ XSTATE_ZMM | X...
2013 Nov 25
0
[PATCH 2/4 V2] X86: enable support for new ISA extensions
...)
return -EINVAL;
if ( !set_xcr0(new_bv) )
@@ -364,6 +379,10 @@ int handle_xsetbv(u32 index, u64 new_bv)
curr->arch.xcr0 = new_bv;
curr->arch.xcr0_accum |= new_bv;
+ /* LWP sets nonlazy_xstate_used independently. */
+ if ( new_bv & (XSTATE_NONLAZY & ~XSTATE_LWP) )
+ curr->arch.nonlazy_xstate_used = 1;
+
mask &= curr->fpu_dirtied ? ~XSTATE_FP_SSE : XSTATE_NONLAZY;
if ( mask )
{
diff --git a/xen/include/asm-x86/xstate.h b/xen/include/asm-x86/xstate.h
index 5617963..de5711e 100644
--- a/xen/include/asm-x86/xstate.h
+++ b/xen/i...
2013 Jun 04
12
[PATCH 0/4] XSA-52..54 follow-up
The first patch really isn''t as much of a follow-up than what triggered
the security issues to be noticed in the first place.
1: x86: preserve FPU selectors for 32-bit guest code
2: x86: fix XCR0 handling
3: x86/xsave: adjust state management
4: x86/fxsave: bring in line with recent xsave adjustments
The first two I would see as candidates for 4.3 (as well as
subsequent backporting,