search for: xshwvecinst

...Src)) It's complaining that v4i32 is not smaller than v8i16, which is true in the sense of vector bit size, and true in the sense of vector element size. To me, a sign extension from i32 to i16 makes no sense. >From the .td file, it looks as if src and dest types have been swapped: class XSHWVecInst<ValueType in_vectype, ValueType out_vectype>: XSHWInst<(outs VECREG:$rDest), (ins VECREG:$rSrc), [(set (out_vectype VECREG:$rDest), (sext (in_vectype VECREG:$rSrc)))]>; multiclass ExtendHalfwordWord { def v4i32: XSHWVecInst<v4i32, v8i16>; Th...

David Greene wrote: > class XSHWVecInst<ValueType in_vectype, ValueType out_vectype>: > def v4i32: XSHWVecInst<v4i32, v8i16>; > Is this pattern as intended, or did I find a real problem? Looks like a bug to me. xshw (extend signed half-word(16bits) to word(32bits)) takes a v8i16 and produces a v4i32. This has likel...