search for: xshwinst

...ich is true in the sense of vector bit size, and true in the sense of vector element size. To me, a sign extension from i32 to i16 makes no sense. >From the .td file, it looks as if src and dest types have been swapped: class XSHWVecInst<ValueType in_vectype, ValueType out_vectype>: XSHWInst<(outs VECREG:$rDest), (ins VECREG:$rSrc), [(set (out_vectype VECREG:$rDest), (sext (in_vectype VECREG:$rSrc)))]>; multiclass ExtendHalfwordWord { def v4i32: XSHWVecInst<v4i32, v8i16>; The multiclass name leads me to believe this was supposed to sign e...