search for: xsave

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2011 Sep 20
15
Re: Bug#642154: BUG: unable to handle kernel paging request at ffff8803bb6ad000
...4183.985621] RIP: > > e030:[<ffffffff810106db>] [<ffffffff810106db>] > > __sanitize_i387_state+0x23/0xe1 > > Source/disassembly: > > void __sanitize_i387_state(struct task_struct *tsk) > { > u64 xstate_bv; > int feature_bit = 0x2; > struct i387_fxsave_struct *fx = &tsk->thread.fpu.state->fxsave; > ffffffff810106b8: 48 8b 97 48 04 00 00 mov 0x448(%rdi),%rdx > > if (!fx) > return; > ffffffff810106bf: 48 85 d2 test %rdx,%rdx > ffffffff810106c2: 0f 84 d0 00 00 00 je 0...
2010 Oct 29
1
[Patch 0/4] Refining Xsave/Xrestore support - Version 2
Hi, Keir, The following patches refines Xen support for CPU Xsave/Xrestore support. There are four patches included. Patch 1/4: Cleaning up existing Xsave code in Xen. Replace xfeature_low and xfeature_high with a u64 variable xfeature_mask. In structure hvm_vcpu, rename xfeature_mask to xcr0 Provide EDX:EAX with all bits set to 1 for XSAV...
2010 Dec 22
0
[PATCH 2/2] xsave: extend xsave/xrstor support to all (64) features
This patch supports xsave (CPUID:0x0000000D) enumeration for all sub-leaves. In specific, it fixes the following issues: 1. The sub-leaves of CPUID:0x0000000D aren''t contiguous. Hypervisor shouldn''t use register values to stop the enumeration. This patch moves checking on XSAVE sub-leaves out of if-els...
2013 Aug 23
2
[PATCH] Nested VMX: Allow to set CR4.OSXSAVE if guest has xsave feature
From: Yang Zhang <yang.z.zhang@Intel.com> We exposed the xsave feature to guest, but we didn''t allow guest to set CR4.OSXSAVE when guest running in nested mode. This will cause win 7 guest fail to use XP mode. In this patch, we allow guest to set CR4.OSXSAVE in nested mode when it has the xsave feature. Signed-off-by: Yang Zhang <yang.z.zhang@Inte...
2009 Sep 29
0
[PATCH] vmx: add the support of XSAVE/XRSTOR to VMX guest
XSAVE/XRSTOR manages the existing and future processor extended states on x86 architecture. The XSAVE/XRSTOR infrastructure is defined in Intel SDMs: http://www.intel.com/products/processor/manuals/ The patch uses the classical CR0.TS based algorithm to manage the states on context switch. At present,...
2011 May 18
1
Re: [PATCH] x86: clear CPUID output of leaf 0xd for Dom0 when xs
Hi Jan, I was wondering if we should not let the code fall through and clear all registers to zero but rather clear just the one bit we care about? My concern is that a future Intel revision may expand this function and return other information besides that XSAVEOPT, which would then be wiped out by the fall-through code. I''m thinking something like this. Let me know if I have misunderstood something. + case 0xd: /* XSAVE */ + if (!xsave_enabled(current)) + __clear_bit(X86_FEATURE_XSAVEOPT % 32, &a); + break; c...
2010 Aug 31
2
[PATCH 2/3 v2] XSAVE/XRSTOR: fix frozen states
If a guest sets a state and dirties the state, but later temporarily clears the state, and at this time if this vcpu is scheduled out, then other vcpus may corrupt the state before the vcpu is scheduled in again, thus the state cannot be restored correctly. To solve this issue, this patch save/restore all states unconditionally on vcpu context switch. Signed-off-by: Weidong Han
2012 Apr 28
2
Segmentation Fault when Starting domUs
...9066] xend[12924]: segfault at b9ff6cd8 ip 00007f36c474afe1 sp 00007f36b9ff6af8 error 4 in libxenguest.so.4.0.0[7f36c4730000+24000] This is on an AMD CPU with the AVX instructions, and I already have this in my grub.cfg: > multiboot /xen-4.1.2.gz dom0_mem=3072M dom0_max_vcpus=2 dom0_vcpus_pin xsave=1 Before adding xsave=1, programs like gdb and xm would crash; after adding it, they don''t but xend still does. Here''s my uname -a: > Linux superbob 3.3.3-1-ARCH #1 SMP PREEMPT Mon Apr 23 09:41:07 CEST 2012 x86_64 AMD Opteron(tm) Processor 4238 AuthenticAMD GNU/Linux I have...
2013 Jun 04
12
[PATCH 0/4] XSA-52..54 follow-up
The first patch really isn''t as much of a follow-up than what triggered the security issues to be noticed in the first place. 1: x86: preserve FPU selectors for 32-bit guest code 2: x86: fix XCR0 handling 3: x86/xsave: adjust state management 4: x86/fxsave: bring in line with recent xsave adjustments The first two I would see as candidates for 4.3 (as well as subsequent backporting, albeit I realize that especially the first one is non-trivial), while the third is code improvement only, and the fourth is really...
2020 Jul 21
0
[PATCH v9 71/84] KVM: introspection: add KVMI_VCPU_SET_XSAVE
...cumentation/virt/kvm/kvmi.rst +++ b/Documentation/virt/kvm/kvmi.rst @@ -873,6 +873,35 @@ the buffer size from the message size (kvmi_msg_hdr.size). * -KVM_EAGAIN - the selected vCPU can't be introspected yet * -KVM_ENOMEM - there is not enough memory to allocate the reply +20. KVMI_VCPU_SET_XSAVE +----------------------- + +:Architecture: x86 +:Versions: >= 1 +:Parameters: + +:: + + struct kvmi_vcpu_hdr; + struct kvmi_vcpu_set_xsave { + __u32 region[0]; + }; + +:Returns: + +:: + + struct kvmi_error_code; + +Modifies the XSAVE area. + +:Errors: + +* -KVM_EINVAL - the buffer is larger tha...
2012 Dec 28
3
Random kernel errors
Hi, I have several random kernel errors in my logs like that : http://pastebin.com/XhfyEjYu I have tested some kernels (3.3.7, 3.4.4, and the latest 3.7.1). There is my "xm info" output : http://pastebin.com/ASyYU2f3 The errors occurs on multiple servers with different hardware, and seems to not happen when no domU are launched. Do you have some ideas to debug that ? Thanks, Neri
2013 Jun 17
0
Re: Fwd: Haswell 4770 misidentified as Sandy Bridge
...dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm ida arat epb xsaveopt pln pts dtherm tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm bogomips : 6795.58 clflush size : 64 cache_alignment : 64 address sizes : 39 bits physical, 48 bits virtual power management: processo...
2017 Sep 30
2
invalid code generated on Windows x86_64 using skylake-specific features
...features.AddFeature(F.first(), F.second); } return strdup(features.getString().c_str()); } On this windows laptop that I am testing on, I get these values: target_specific_cpu_args: skylake target_specific_features: +sse2,+cx16,-tbm,-avx512ifma,-avx512dq,-fma4,+prfchw,+bmi2,+xsavec,+fsgsbase,+popcnt,+aes,+xsaves,-avx512er,-avx512vpopcntdq,-clwb,-avx512f,-clzero,-pku,+mmx,-lwp,-xop,+rdseed,-sse4a,-avx512bw,+clflushopt,+xsave,-avx512vl,-avx512cd,+avx,-rtm,+fma,+bmi,+rdrnd,-mwaitx,+sse4.1,+sse4.2,+avx2,+sse,+lzcnt,+pclmul,-prefetchwt1,+f16c,+ssse3,+sgx,+cmov,-avx512vbmi,+movbe,...
2012 Dec 19
9
kernel log flooded with: xen_balloon: reserve_additional_memory: add_memory() failed: -17
...ar why the dom0 is kernel is trying to balloon up as the Xen command line is specifies a fixed dom0 memory allocation and noselfballooning is specified for the kernel and ballooning is also disabled in the xend-config.sxp / xl.conf (one system using xm, another xl) xen command line: placeholder xsave=0 iommu=0 console=vga,com2 com2=115200,8n1 dom0_mem=max:6144m kernel command line: root=/dev/loop0 ro console=tty1 console=hvc0 earlyprintk=xen nomodeset noselfballooning Examining /proc/iomem does show that the dom0 memory allocation is actually 64kb short of 6144Mb: cat /proc/iomem | grep S...
2014 May 29
1
Divide error in kvm_unlock_kick()
...CPU flags inside the crashing guest look like this: > > fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush > mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb lm rep_good nopl > extd_apicid pni pclmulqdq ssse3 fma cx16 sse4_1 sse4_2 x2apic popcnt aes xsave > avx f16c hypervisor lahf_lm cmp_legacy svm cr8_legacy abm sse4a misalignsse > 3dnowprefetch osvw xop fma4 tbm arat npt nrip_save tsc_adjust bmi1 > > whereas in a (working) -cpu qemu64 guest, they look like this: > > fpu de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat...
2014 May 29
1
Divide error in kvm_unlock_kick()
...CPU flags inside the crashing guest look like this: > > fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush > mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb lm rep_good nopl > extd_apicid pni pclmulqdq ssse3 fma cx16 sse4_1 sse4_2 x2apic popcnt aes xsave > avx f16c hypervisor lahf_lm cmp_legacy svm cr8_legacy abm sse4a misalignsse > 3dnowprefetch osvw xop fma4 tbm arat npt nrip_save tsc_adjust bmi1 > > whereas in a (working) -cpu qemu64 guest, they look like this: > > fpu de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat...
2013 Jun 17
2
Re: Fwd: Haswell 4770 misidentified as Sandy Bridge
...se sse2 ss ht tm pbe syscall nx pdpe1gb > rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology > nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx > est tm2 ssse3 fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt > tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm ida arat epb > xsaveopt pln pts dtherm tpr_shadow vnmi flexpriority ept vpid fsgsbase > tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm > bogomips : 6795.91 > clflush size : 64 > cache_alignment : 64 > address sizes : 39 bits physical, 48 bits virtu...
2020 Sep 14
0
Re: [ovirt-users] Re: Testing ovirt 4.4.1 Nested KVM on Skylake-client (core i5) does not work
...feature policy="require" name="stibp"/> > > <feature policy="require" name="arch-capabilities"/> > > <feature policy="require" name="ssbd"/> > > <feature policy="require" name="xsaves"/> > > <feature policy="require" name="pdpe1gb"/> > > <feature policy="require" name="ibpb"/> > > <feature policy="require" name="amd-ssbd"/> > > <feature policy="r...
2012 Apr 05
5
lastest xen unstable crash
Hi everyone, I was trying to build a new machine but the system keeps rebooting. I used the lasted unstable version from xen-unstable.hg. I have tried with Fedora 16 (kernel 3.3.0-8) and Xubuntu 11.10 (3.0.0.17-generic). The output to my serial console is attached. Cheers, Francisco _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org
2020 Nov 17
2
image works in native but not in vm when cpu mode='host-passthrough' is set
...scpu in native and vm: https://dpaste.com/3TR8QJ5G8 and the vm's xml: https://dpaste.com/984JX4LUQ if I build the image with the default flags (march=x86-64), the vm boots well. my new chost is -O2 -pipe -march=skylake -mabm -mno-adx -mno-avx -mno-avx2 -mno-bmi -mno-bmi2 -mno-f16c -mno-fma -mno-xsave -mno-xsavec -mno-xsaveopt -mno-xsaves -mno-sgx the cpu is Intel(R) Pentium(R) CPU G4560 @ 3.50GHz thoughts? Thanks, Dagg.