Displaying 1 result from an estimated 1 matches for "xor6".
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2015 Sep 30
2
InstCombine wrongful (?) optimization on BinOp with SameOperands
...me upon the following optimization (during instcombine):
*IC: Visiting: %mul = mul nuw i64 %conv, %conv1
IC: Visiting: %shr = lshr i64 %mul, 32
IC: Visiting: %conv2 = trunc i64 %shr to i32
IC: Visiting: %conv3 = trunc i64 %mul to i32
IC: Visiting: %xor = xor i32 %conv3, %conv2
IC: ADD: %xor6 = xor i64 %mul, %shr
IC: Old = %xor = xor i32 %conv3, %conv2
New = <badref> = trunc i64 %xor6 to i32
*
which seems to be performed by SDValue
DAGCombiner::SimplifyBinOpWithSameOpcodeHands(SDNode *N)
In my backend's architecture truncate is free, but zext is not (and i64
is not...