Displaying 2 results from an estimated 2 matches for "xmm0b".
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2012 Jan 09
3
[LLVMdev] Calling conventions for YMM registers on AVX
On Jan 9, 2012, at 10:00 AM, Jakob Stoklund Olesen wrote:
>
> On Jan 8, 2012, at 11:18 PM, Demikhovsky, Elena wrote:
>
>> I'll explain what we see in the code.
>> 1. The caller saves XMM registers across the call if needed (according to DEFS definition).
>> YMMs are not in the set, so caller does not take care.
>
> This is not how the register allocator
2012 Jan 10
0
[LLVMdev] Calling conventions for YMM registers on AVX
...ect: RE: [LLVMdev] Calling conventions for YMM registers on AVX
We support Win64, that's right.
We defined the upper part of YMM like this
// XMM Registers, used by the various SSE instruction set extensions.
// Theses are actually only needed for implementing the Win64 CC with AVX.
def XMM0b: Register<"xmm0b">, DwarfRegNum<[17, 21, 21]>;
def XMM1b: Register<"xmm1b">, DwarfRegNum<[18, 22, 22]>;
def XMM2b: Register<"xmm2b">, DwarfRegNum<[19, 23, 23]>;
def XMM3b: Register<"xmm3b">, DwarfRegNum<[20,...