Displaying 6 results from an estimated 6 matches for "xmem".
Did you mean:
mem
2010 Jan 27
1
Some additions to CELT_RESET_STATE for 0.7.1
...o CELT_RESET_STATE in celt_encoder_ctl:
st->fold_decision = 1;
st->tonal_average = QCONST16(1.,8);
st->gain_prod = 0;
st->vbr_reservoir = 0;
st->vbr_drift = 0;
st->vbr_offset = 0;
st->vbr_count = 0;
st->xmem = 0;
CELT_MEMSET(st->pitch_buf, 0, (MAX_PERIOD>>1)+2);
and the following lines should be added to CELT_RESET_STATE in
celt_decoder_ctl:
#ifdef NEW_PLC
CELT_MEMSET(st->lpc, 0, C*LPC_ORDER);
#endif
BTW 0.7.1 is working very nicely for me.
Cheers,
John Ridges
2006 Apr 21
2
Major internal changes, TI DSP build change
> The C5x and C6x output diverges in build 10143, which has log message "lpc
> floor converted to fixed-point." Also, the measured SNR changed from 11.05
> in builds 9854-10141 to 9.22 and 9.24 in 10143.
Actually, build 10143 introduced another bug, that was the reason for
the 1.1.11.1 release.
> There is just four lines in modes.c which declare the constant, and one
2006 Apr 22
2
Major internal changes, TI DSP build change
...eck that the DSP results match what you get on a PC?
> >Does the C55 have a 32x16 multiplier or do you mean it handles my
> >emulation of it well?
>
> I has two ALUs with 17x17 bit MACs, and it has an instruction that does
> this:
> ACy = M40(rnd((ACx >> #16) + (uns(Xmem) * uns(Ymem))))
>
> I never quite understood this, so I went of and looked at the manuals. It
> can multiply the low half in one cycle, then shift and add it to the high
> half in a second cycle. And, in a type loop the parallel ALUs would allow
> one 32x16 multiply per cycle....
2006 Apr 22
0
Major internal changes, TI DSP build change
...16
>> multiplies, so I have not played with PRECISION16 since last year.
>
>Does the C55 have a 32x16 multiplier or do you mean it handles my
>emulation of it well?
I has two ALUs with 17x17 bit MACs, and it has an instruction that does
this:
ACy = M40(rnd((ACx >> #16) + (uns(Xmem) * uns(Ymem))))
I never quite understood this, so I went of and looked at the manuals. It
can multiply the low half in one cycle, then shift and add it to the high
half in a second cycle. And, in a type loop the parallel ALUs would allow
one 32x16 multiply per cycle.
The C54x cannot do this,...
2006 Apr 22
0
Major internal changes, TI DSP build change
...o this, but not any time soon.
>> >Does the C55 have a 32x16 multiplier or do you mean it handles my
>> >emulation of it well?
>>
>> I has two ALUs with 17x17 bit MACs, and it has an instruction that does
>> this:
>> ACy = M40(rnd((ACx >> #16) + (uns(Xmem) * uns(Ymem))))
>>
>> I never quite understood this, so I went of and looked at the manuals.
>> It
>> can multiply the low half in one cycle, then shift and add it to the high
>> half in a second cycle. And, in a type loop the parallel ALUs would
>> allow
>...
2010 Mar 09
3
Enhanced MDISKCHK.COM and MEMDISK patches
Good day to all,
Gert Hulselmans requested a feature for MDISKCHK.COM that would function
roughly like GETARGS.COM[1] by Murali Krishnan Ganapathy: DOS SET
command output for MEMDISK kernel arguments passed by previous
boot-loaders. He also needed to support the case for
MEMDISK-in-a-MEMDISK type situations, where all MEMDISK kernel arguments
could be gathered together and output as a list