Displaying 3 results from an estimated 3 matches for "xl10".
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2013 Jan 04
3
[LLVMdev] instruction scheduling issue
...e
memory access I want to monitor because the effective address used by 402a9e is passed to the function call.
402a91: 48 8d bc 1c 48 02 00 lea 0x248(%rsp,%rbx,1),%rdi
402a98: 00
402a99: e8 82 e0 ff ff callq 400b20 <llvm_memory_profiling at plt>
/home/xl10/llvm/test//luleshOMP-0611.cc:1974
402a9e: f2 0f 10 84 1c 48 02 movsd 0x248(%rsp,%rbx,1),%xmm0
402aa5: 00 00
402aa7: f2 0f 11 84 24 b8 01 movsd %xmm0,0x1b8(%rsp)
However, due to instruction scheduling, the following instruction of the function call is not always the...
2013 Jan 07
0
[LLVMdev] instruction scheduling issue
...ory access I want to monitor because the effective address used by 402a9e
is passed to the function call.
402a91: 48 8d bc 1c 48 02 00 lea 0x248(%rsp,%rbx,1),%rdi
402a98: 00
402a99: e8 82 e0 ff ff callq 400b20
<llvm_memory_profiling at plt>
/home/xl10/llvm/test//luleshOMP-0611.cc:1974
402a9e: f2 0f 10 84 1c 48 02 movsd 0x248(%rsp,%rbx,1),%xmm0
402aa5: 00 00
402aa7: f2 0f 11 84 24 b8 01 movsd %xmm0,0x1b8(%rsp)
However, due to instruction scheduling, the following instruction of the
function call is not alway...
2013 Jan 07
0
[LLVMdev] instruction scheduling issue
Krzysztof,
This would be ideal. How can I do the instrumentation pass after the
instruction scheduling?
Xu Liu
Quoting Krzysztof Parzyszek <kparzysz at codeaurora.org>:
> On 1/7/2013 1:53 PM, Sergei Larin wrote:
>>
>> Also, how much performance are you willing to sacrifice to do what you
>> do? Maybe turning off scheduling all together is an acceptable solution?