search for: xinmin

Displaying 20 results from an estimated 86 matches for "xinmin".

2016 Jul 15
3
RFC: SIMD math-function library
Is it possible to see the source code of the open-sourced SVML? The diff file does not include the library. I searched the Internet but I could not find. Regards, Naoki Shibata On 2016/07/15 13:55, Tian, Xinmin wrote: > Naoki, > > Intel is planning open-source SVML library (most of them if it not 100%), 6 functions of SVML are open sourced for GCC and LLVM already. But, Intel SVML is x86 centric (SSE2, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 ....}. Personally, I am not sure if it would be fairly easy t...
2014 Sep 29
2
[LLVMdev] Proposal for ""llvm.mem.vectorize.safelen"
...nk the 2 outcomes are: - the current spec is unclear and will be clarified - in order to support safelen() and even the simd construct itself, LLVM will require infrastructure work to know when a lexically backwards dependence may have been introduced. Jon -----Original Message----- From: Tian, Xinmin [mailto:xinmin.tian at intel.com] Sent: Monday, September 29, 2014 10:43 AM To: Renato Golin; Hal Finkel Cc: Humphreys, Jonathan; Robison, Arch; LLVM Dev Subject: RE: [LLVMdev] Proposal for ""llvm.mem.vectorize.safelen" Renato, I think Hal meant to ensure partial ordering, e.g. not...
2017 Feb 01
2
[RFC] IR-level Region Annotations
From: mehdi.amini at apple.com [mailto:mehdi.amini at apple.com] Sent: Tuesday, January 31, 2017 9:03 PM To: Tian, Xinmin <xinmin.tian at intel.com> Cc: Sanjoy Das <sanjoy at playingwithpointers.com>; Adve, Vikram Sadanand <vadve at illinois.edu>; llvm-dev at lists.llvm.org; llvm-dev-request at lists.llvm.org Subject: Re: [llvm-dev] [RFC] IR-level Region Annotations On Jan 31, 2017, at 7:53 PM, Tia...
2017 Feb 01
2
[RFC] IR-level Region Annotations
> On Jan 31, 2017, at 10:59 PM, Tian, Xinmin <xinmin.tian at intel.com> wrote: > > >   <> > From: mehdi.amini at apple.com <mailto:mehdi.amini at apple.com> [mailto:mehdi.amini at apple.com <mailto:mehdi.amini at apple.com>] > Sent: Tuesday, January 31, 2017 9:03 PM > To: Tian, Xinmin <xinmin.t...
2017 Feb 01
2
[RFC] IR-level Region Annotations
...o the tag of enclosing parallel region, if there is enclosing parallel region. In our icc implementation, it is even simple, as we have routine level symbol table, the inliner adds ”private” attribute to those local variables w/o checking enclosing scope, the parallelizer does check and use it. Xinmin From: mehdi.amini at apple.com [mailto:mehdi.amini at apple.com] Sent: Tuesday, January 31, 2017 7:31 PM To: Tian, Xinmin <xinmin.tian at intel.com> Cc: Sanjoy Das <sanjoy at playingwithpointers.com>; Adve, Vikram Sadanand <vadve at illinois.edu>; llvm-dev at lists.llvm.org; llvm...
2017 Feb 01
0
[RFC] IR-level Region Annotations
> On Jan 31, 2017, at 7:53 PM, Tian, Xinmin <xinmin.tian at intel.com> wrote: > > In this case, inliner is educated to add all local variables to the tag of enclosing parallel region, if there is enclosing parallel region. So isn’t it a good example that shows that your intrinsic *cannot* be opaque and that IR passes need to...
2014 Sep 29
3
[LLVMdev] Proposal for ""llvm.mem.vectorize.safelen"
On 28 September 2014 22:09, Hal Finkel <hfinkel at anl.gov> wrote: > Thanks Xinmin! > > So we'll need a method to ensure the correct (partial) ordering. I thought that the idea was to avoid computing loop dependencies when safelen is specified, at least at that level. We might do it to a greater length, but we should assume it to be safe for distances < VL. We stil...
2016 Jul 27
5
RFC: SIMD math-function library
...ive? My inclination is to target it for the new parallel_libs project, in part because I feel like compiler-rt has too many things grouped together already, and in part because vectorization is a form of parallel execution. Thoughts? Thanks again, Hal ----- Original Message ----- > From: "Xinmin Tian" <xinmin.tian at intel.com> > To: "Naoki Shibata" <shibatch.sf.net at gmail.com>, "Hal Finkel" <hfinkel at anl.gov> > Cc: llvm-dev at lists.llvm.org, "Chandler Carruth" <chandlerc at gmail.com>, "Matt Masten" <matt.m...
2016 Jul 15
3
RFC: SIMD math-function library
...going to contribute? Naoki Shibata On 2016/07/15 12:53, Hal Finkel wrote: > Hi again, > > As this RFC implies, I've been using the SLEEF library proposed here with Clang/LLVM for many years, and fully support its adoption into the LLVM project. > > I'm CC'ing Matt and Xinmin from Intel who have started working on contributing support for their SVML library to LLVM (http://reviews.llvm.org/D19544), and I understand plan to contribute (some subset of) the vector math functions themselves. I'm also excited about Intel's planned contributions. > > Here's...
2017 Jan 12
3
[RFC] IR-level Region Annotations
And “map” and “firstprivate” … are represented as MDString, right? Thanks. From: Hongbin Zheng [mailto:etherzhhb at gmail.com] Sent: Wednesday, January 11, 2017 3:58 PM To: Tian, Xinmin <xinmin.tian at intel.com> Cc: David Majnemer <david.majnemer at gmail.com>; Hal Finkel <hfinkel at anl.gov>; llvm-dev at lists.llvm.org Subject: Re: [llvm-dev] [RFC] IR-level Region Annotations Yes, those are LLVM SSA values. "map" (m, n) should be "map" (i3...
2019 Jun 24
3
RFC: Interface user provided vector functions with the vectorizer.
> On Jun 24, 2019, at 10:53 AM, Tian, Xinmin <xinmin.tian at intel.com> wrote: > > To me, it is also an issue related to SIMD signature matching when the vectorizer kicks in. Losing info from FE to BE is not good in general. > Yes, we cannot loose such information. In particular, the three examples I reported are all genera...
2017 Jan 20
5
[RFC] IR-level Region Annotations
> On Jan 20, 2017, at 10:44 AM, Tian, Xinmin via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Sanjoy, the IR would be like something below. It is ok to hoist alloca instruction outside the region. There are some small changes in optimizer to understand region-annotation intrinsic. > > { void main() { > i32* val...
2017 Feb 01
1
[RFC] IR-level Region Annotations
> On Jan 31, 2017, at 6:48 PM, Tian, Xinmin <xinmin.tian at intel.com> wrote: > > Let me try this. > > You can simply consider the prepare-phase (e.g. pre-privatization) were done in FE (actually a library can be used by multiple FEs at LLVM IR level), the region is run with 1 thread, region annotation (scope, single...
2017 Feb 01
0
[RFC] IR-level Region Annotations
Sent from my iPhone > On Jan 31, 2017, at 7:27 PM, Tian, Xinmin <xinmin.tian at intel.com> wrote: > > Remember that, the prepare-phase is invoked in the FE or right after FE, inlining is not happening, that is why we don't call it "pass". Chandler made a good point for this case a long time back. > What I was describing is th...
2019 Jun 24
2
RFC: Interface user provided vector functions with the vectorizer.
...al cases (where FE doesn't "change" type) while we continue working out the details on non-trivial cases. Thanks, Hideki From: Doerfert, Johannes [mailto:jdoerfert at anl.gov] Sent: Monday, June 24, 2019 9:21 AM To: Francesco Petrogalli <Francesco.Petrogalli at arm.com>; Tian, Xinmin <xinmin.tian at intel.com> Cc: Saito, Hideki <hideki.saito at intel.com>; Simon Moll <moll at cs.uni-saarland.de>; LLVM Development List <llvm-dev at lists.llvm.org>; Clang Dev <cfe-dev at lists.llvm.org>; Renato Golin <rengolin at gmail.com>; Finkel, Hal J. <...
2017 Feb 01
2
[RFC] IR-level Region Annotations
> On Jan 31, 2017, at 5:38 PM, Tian, Xinmin <xinmin.tian at intel.com> wrote: > >>>>> Ok, but this looks like a “workaround" for your specific use-case, I don’t see how it can scale as a model-agnostic and general-purpose region semantic. > > I would say it is a design trade-off. I’m not sure if we’re ta...
2017 Feb 01
0
[RFC] IR-level Region Annotations
...ia tags which is the actual implementation is done) marked with region intrinsic functions. What optimization will mess up with this region-annotation? -----Original Message----- From: mehdi.amini at apple.com [mailto:mehdi.amini at apple.com] Sent: Tuesday, January 31, 2017 5:47 PM To: Tian, Xinmin <xinmin.tian at intel.com> Cc: Sanjoy Das <sanjoy at playingwithpointers.com>; Adve, Vikram Sadanand <vadve at illinois.edu>; llvm-dev at lists.llvm.org; llvm-dev-request at lists.llvm.org Subject: Re: [llvm-dev] [RFC] IR-level Region Annotations > On Jan 31, 2017, at 5:38 PM...
2017 Jan 11
2
[RFC] IR-level Region Annotations
...te"(), "parallel for", "simd" (), "shared" (i32 *xp, i32 *yp), "linear_iv" (), "firstprivate" (i32 m, i32 n), "map" (m, n) ] ; From: Hongbin Zheng [mailto:etherzhhb at gmail.com] Sent: Wednesday, January 11, 2017 3:29 PM To: Tian, Xinmin <xinmin.tian at intel.com> Cc: David Majnemer <david.majnemer at gmail.com>; Hal Finkel <hfinkel at anl.gov>; llvm-dev at lists.llvm.org Subject: Re: [llvm-dev] [RFC] IR-level Region Annotations I am not an OpenMP expert, so some annotation may be wrong: // CHECK: [[ENTRY:%[a-zA...
2016 Dec 12
0
[RFC] Enable "#pragma omp declare simd" in the LoopVectorizer
Hi Xinmin, I have updated the clang patch using the standard name mangling you suggested - I was not fully aware of the C++ mangling convention “_ZVG”. I am using “D” for 64-bit NEON and “Q” for 128-bit NEON, which makes NEON vector symbols look as follows: _ZVGQN2v__Z1fd _ZVGDN2v__Z1ff _ZVGQN4v__Z1ff H...
2016 Dec 08
0
[RFC] Enable "#pragma omp declare simd" in the LoopVectorizer
On 8 December 2016 at 18:11, Tian, Xinmin via llvm-dev <llvm-dev at lists.llvm.org> wrote: > For name mangling, we have to follow certain rules of C/C++ (e.g. prefix needs to _ZVG ....). David Majnemer who is the owner and stakeholder for approval for Clang and LLVM. Also, we need to pay attention to GCC compatibility. I would...