Displaying 20 results from an estimated 511 matches for "xin".
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2006 Oct 12
9
[PATCH] an obvious fix to PIC IO intercept
an obvious fix to PIC IO intercept.
In PIC IO, address from send_pio_req is physical address already.
Signed-off-by: Xiaohui Xin <xiaohui.xin@intel.com>
Signed-off-by: Xiaowei Yang <xiaowei.yang@intel.com>
Signed-off-by: Xin Li <xin.b.li@intel.com>
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2005 Jul 05
0
lowess output looks wrong (PR#7891)
...ng on Windows 2000 system.
> # Someone noticed a similar problem and reported it under ID 4459.
>
> # Data to reproduce...
> R <- c(3.0, 3.5, 4.5, 5.0, 10.0)
> T <- R
> T <- 1.5*T + 0.1*(T^2)
>
> # Bug in lowess (third y value is wrong in lowess output)...
> xin <- log2(R)
> yin <- log2(T)
> minVal <- min (xin, yin)
> maxVal <- max (xin, yin)
> plot (xin, yin, xlim=c(minVal, maxVal), ylim=c(minVal, maxVal))
> lines (lowess(xin, yin, f = 2/3, iter = 3))
> text(3.5, 2, "3rd lowess point is wrong.", col="red")...
2005 Sep 15
3
Xend can not start
With changeset 6869, I can _not_ start xend.
Did anybody else meet the same issue?
[root@xin ~]# xend start
Traceback (most recent call last):
File "/usr/sbin/xend", line 32, in ?
from xen.xend.server import SrvDaemon
File
"/home/xin/work/xmp/xen32-smp/dist/install/usr/lib/python/xen/xend/serve
r/SrvDaemon.py", line 30, in ?
File
"/home/xin/wor...
2008 May 09
14
[PATCH] patch to support super page (2M) with EPT
...gs.
We let them to be 4K pages as normal.
super_page_common.patch
To modify the p2m interfaces by adding an order parameter, such as
guest_physmap_add_page(), p2m_set_entry(), etc.
p2m-ept-file.patch
To handle the EPT tables to support super page.
Signed-off-by: Xin Xiaohui <xiaohui.xin@intel.com>
Signed-off-by: Li Xin, B <xin.b.li@intel.com>
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2008 Oct 29
1
How to set read.table variables to vectors?
The summary stats for the xin and yin variables below are correct. However,
if I use plot(xin,yin), an exception is thrown saying that "object xin is
not found."
Also, it is apparent that I can't successfully replace the x and y vectors
with values from xin and yin.
The four plots on one panel are showing b...
2006 Mar 02
2
[PATCH ] don''t compile HVM_DBG_LOG into xen by default
Don''t compile HVM_DBG_LOG into xen by default.
Signed-off-by: Xin Li <xin.b.li@intel.com>
Signed-off-by: Jun Nakajima <jun.nakajima@intel.com>
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2007 Oct 17
7
[VTD][RESEND]add a timer for the shared interrupt issue for vt-d
...rom the TIME_OUT_PERIOD macro which may confuse
others.
3) Add some explanation to the return value for the
hvm_pci_intx_assert(), and the has_timer parameter for the hvm_dpci_eoi.
We have tested it with shared interrupt between dom0/HVM(pcie/disk) and
HVM/HVM(pcie/pcie).
Signed-off-by: Xin, Xiaohui<xiaohui.xin@intel.com
Signed-off-by: Kevin Tian <kevin.tian@intel.com>
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2009 Jan 22
8
[PATCH 2/2] Enhance MTRR/PAT virtualization for EPT & VT-d enabled both
The patch attached is to set effective memory type for EPT according to the VT-d snoop control capability, and also includes some cleansup for EPT & VT-d both enabled.
Signed-off-by: Zhai, Edwin Edwin.Zhai@intel.com<mailto:Edwin.Zhai@intel.com>
Signed-off-by: Xin, Xiaohui xiaohui.xin@intel.com<mailto:xiaohui.xin@intel.com>
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2007 Sep 30
6
[VTD][PATCH] a time out mechanism for the shared interrupt issue for vtd
...a timer, and the time out value is sufficient large to
tolerant
the delaying used to wait for the physical interrupt deassertion.
The patch works well with the situation that SATA disk shares interrupt
with PCIe NIC.
And for vtd=1, the ioapic_ack=new method also works well.
Signed-off-by: Xin, Xiaohui<xiaohui.xin@intel.com
Signed-off-by: Kevin Tian <kevin.tian@intel.com>
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2007 Mar 28
7
[PATCH] Proper use of VMX execution controls MSR.
Better use of VMX execution controls MSR.
Signed-off-by: Xin Li<xin.b.li@intel.com>
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2005 Nov 11
3
[PATCH] add MOVSX instr support to VMX MMIO decoder
Add MOVSX instr support to VMX MMIO decoder.
Signed-off-by: Xin Li <xin.b.li@intel.com>
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2006 Aug 31
2
[PATCH]Add CR8 virtualization
This patch adds CR8 virtualization. It''s the initial patch for booting
HVM x64 Windows guest, and just let every CR8 access issues vmexit.
And later we will do acceleration to it.
Signed-off-by: Xiaohui Xin <xiaohui.xin@intel.com>
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2011 May 30
6
[PATCH] CPUID level 0x00000007:0 (ebx) is word 9, instead of word 7
CPUID level 0x00000007:0 (ebx) is word 9, instead of word 7.
... make it consistent with native Linux.
Signed-off-by: Li Xin <xin.li@intel.com>
diff -r d7c755c25bb9 xen/include/asm-x86/cpufeature.h
--- a/xen/include/asm-x86/cpufeature.h Sat May 28 08:58:08 2011 +0100
+++ b/xen/include/asm-x86/cpufeature.h Tue May 31 07:34:34 2011 +0800
@@ -142,7 +142,7 @@
#define X86_FEATURE_TOPOEXT (6*32+22) /* topology ex...
2017 Mar 18
2
4.0.0 on March 2017 ?
Should not the 4.0.0 release be March _2017_ in the "Release Emails"
section on http://llvm.org/ ?
-Xin
2012 Jan 05
5
[LLVMdev] clang for opencl
I do not know too much about clang, is opencl publicly supported in
clang ? how about cuda ?
Thanks
Xin
2010 Dec 07
9
[PATCH] Btrfs: pwrite blocked when writing from the mmaped buffer of the same page
...lled, page fault happens and the same page needs to be locked again
in filemap_fault(). The fix is to move iov_iter_fault_in_readable() before prepage_pages() to make page
fault happen before pages are locked. And also disable page fault in critical region in
btrfs_copy_from_user().
Signed-off-by: Xin Zhong <xin.zhong@intel.com>
---
fs/btrfs/file.c | 23 +++++------------------
1 files changed, 5 insertions(+), 18 deletions(-)
diff --git a/fs/btrfs/file.c b/fs/btrfs/file.c
index dfe15dc..c1faded 100644
--- a/fs/btrfs/file.c
+++ b/fs/btrfs/file.c
@@ -57,15 +57,11 @@ static noinline int...
2012 Mar 13
2
[LLVMdev] GPU thread/block/grid size contraints in LLVM PTX backend
but does it have default values ?
Thanks
Xin
On Tue, Mar 13, 2012 at 5:19 AM, Che-Liang Chiou <clchiou at gmail.com> wrote:
> You specify shader model, bit size and etc. arch-specified parameters
> though -march, -mattr and -mcpu, but AFAIK, PTX backend does not use
> the GPU thread/block/grid size information in optimization...
2007 Jul 10
5
[PATCH] vmwrite high 32 bits of 64bit VMCS fields when in PAE mode
vmwrite higher 32 bits of 64bit VMCS fields when in PAE mode.
Signed-off-by: Xin Li <xin.b.li@intel.com>
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2008 Feb 16
3
how to specify the location of tick mark on x axies
Dear:
I want to plot barplot and let bar be in the middle of each x axis category.
Do you have this experience?
Many Thanks!
Xin
[[alternative HTML version deleted]]
2006 Mar 29
1
calling R's optimization routines from C
...double sum = 0.0;
int i;
for (i=0; i<n; i++) {
double t = X[i] - mu;
sum += t*t;
}
return sum;
}
int main(void)
{
int i,n=1, trace=1, maxit=100, fail, fncount;
double *par, abstol=0.0001, intol=.0001, alpha=1, beta=.5, gamma=2, *xin, *x,
Fmin;
MyData ex;
par=malloc(n*sizeof(double));
xin=malloc(n*sizeof(double));
x=malloc(n*sizeof(double));
par[0]=5;
xin[0]=5;
ex.n=5;
ex.X=malloc(ex.n*sizeof(double));
for(i=0;i<ex.n;i++) ex.X[i]=i;
nmmin(n,xin,x,&Fmin,myfunc,&fail,abstol,intol,&ex,al...