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Hi, All, Our team within the Software and Services Group at Intel is looking for compiler engineers to join us. Currently two positions are available, see attached links. If you are interested, you can apply online or email me at xiangyang.guo at intel.com. Thanks. --Xiangyang (Mark) Guo *https://intel.wd1.myworkdayjobs.com/External/job/US-Oregon-Hillsboro/Web-Runtime-Compiler-Engineer_JR0815258-1 <https://intel.wd1.myworkdayjobs.com/External/job/US-Oregon-Hillsboro/Web-Runtime-Compiler-Engineer_JR0815258-1>* http://career.i...

Hi, Diego, Thanks for your quick reply. Inserting a copy instruction may not work here because I have a limitation of virtual register number. I need to assign registers with ssa form to registers without ssa form. I will look the source code you point out. Thanks Xiangyang On Fri, Apr 24, 2015 at 4:19 PM, Diego Novillo <dnovillo at google.com> wrote: > > > On Fri, Apr 24, 2015 at 3:17 PM, Xiangyang Guo <xguo6 at ncsu.edu> wrote: > >> Hi, >> >> I want to convert LLVM IR to another type of IR, which has no SSA form. >>...

There's been some recent noise on the mailing list about requiring -fno-rtti; http://lists.llvm.org/pipermail/llvm-dev/2015-August/089010.html Could that be it? On Sat, Aug 22, 2015 at 12:21 AM, Xiangyang Guo via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi, James and Philip, Thanks for your help. > > Based on your advice, I downloaded llvm-3.7. However, with this new > version of LLVM, I have the following errors when I compile my previous > code: > > g++ -o parser...

...works while the 'const-double' doesn't work. From the -debug log, it seems "f64 = ConstantFP" is replaced by "f64,ch = load" and this is where the error happens. Can anyone tell me why this happens and how to make this work? Any suggestion is appreciated. Regards, Xiangyang -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151202/a35b8b98/attachment.html>

Thanks for your reply, escha, Yes, -loop-rorate makes it work. Regards, Xiangyang 2015-12-01 12:48 GMT-05:00 <escha at apple.com>: > > > On Dec 1, 2015, at 9:30 AM, Xiangyang Guo via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > > > Hi, All, > > > > Suppose I define one memory read only intrinsic function "foo" in...

On 1 December 2015 at 12:33, Xiangyang Guo via llvm-dev <llvm-dev at lists.llvm.org> wrote: > if I have the following IR, LICM doesn't work again, even if I use > '-loop-rotate' firstly. In this IR, the return value of intrinsic function > "foo" is used by another function "func2" as parame...

...her cases %vreg1 belongs to RegA_RegB. Can you tell me how TableGen decides which is which? At first, I guess &verg0 will be assigned by R8 to R15 only so that %vreg0 belongs to RegB. But it seems my guess is wrong because %verg0 can also be assigned by R0. Any input is appreciable. Regards, Xiangyang -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160202/915b1f52/attachment.html>

Thanks for your reply, Philip. You are right, when I use LLVM-3.8, the 'argmemonly' shows up. Previously, I use LLVM-3.7. I think idempotent is what I want. Can you tell me how to add idempotent attribute to the function? Thanks. Regards, Xiangyang 2016-03-24 14:30 GMT-07:00 Philip Reames <listmail at philipreames.com>: > > > On 03/24/2016 12:45 PM, Xiangyang Guo via llvm-dev wrote: > > Hi, > > When I define an intrinsic function with memory write permission, my > assumption is that we can either attach [IntrRe...

...For intrinsic functio foo5, I don't understand it. I mean, when I apply [IntrReadWriteArgMem] to this intrinsic function, I hope the LLVM can know the second one is redundant because nothing is changed. Can you tell why LLVM cannot optimize it in this case? Any input is appreciable. Regards, Xiangyang -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160324/6f2c51ca/attachment.html>

...32 %v5_int_42, 0 br i1 %14, label %cond_4_else2, label %cond_4 ************************************************************************ (I change the variable's name a little bit for the first four instructions in each BB because the name of variables in my original IR has a long.) Regards Xiangyang -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150418/d20fd22c/attachment.html>

Hi Xiangyang, The algorithm for loop unrolling was changed post-3.5 to do more what you'd expect. If you use 3.6 or 3.7 you'll likely get better results. Cheers, James On Thu, 20 Aug 2015 at 18:09 Philip Reames via llvm-dev < llvm-dev at lists.llvm.org> wrote: > On 08/20/2015 07:38 AM, Xia...

...oundary checking (add, compare, conditional branch) at the end of each unrolled part. I'm really confused about this. Does Clang do something special? Or do I need to do something else to eliminate the unnecessary loop boundary checking at the end of each unrolled part? Thanks for your help. Xiangyang On Fri, Aug 21, 2015 at 11:29 AM, Xiangyang Guo <xguo6 at ncsu.edu> wrote: > Hi, Jeremy, > > Thanks for your reply. I tried -fno-rtti yesterday and no luck. > > Regards, > > Xiangyang > > On Fri, Aug 21, 2015 at 11:05 AM, Jeremy Lakeman <Jeremy.Lakeman at gmai...

...21.unr = phi double [ undef, %.lr.ph9 ], [ %13, %7 ]*". I have two questions: (1) Why this 'undef' is generated? Because before 'loop unrolling', there is no such 'undef'. (2) How LLVM backend deals with this 'undef'? Any suggestion is appreciable. Regards, Xiangyang -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150825/f97be2b5/attachment.html>

On 03/24/2016 12:45 PM, Xiangyang Guo via llvm-dev wrote: > Hi, > > When I define an intrinsic function with memory write permission, my > assumption is that we can either attach [IntrReadWriteArgMem] or [] to > the intrinsic function. Based on the comment of the source code , > "IntrReadWriteArgMem - This...

...; preds = %1 %4 = call i32 @llvm.foo(i32 %a, i32 3) %5 = add nsw i32 %i.0, 1 br label %1 ; <label>:6 ; preds = %1 ret i32 %ret.0 } ; Function Attrs: nounwind readonly declare i32 @llvm.foo(i32, i32) #1 Regards, Xiangyang -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151201/c2e471a9/attachment.html>

> On Mar 24, 2016, at 12:45 PM, Xiangyang Guo via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi, > > When I define an intrinsic function with memory write permission, my assumption is that we can either attach [IntrReadWriteArgMem] or [] to the intrinsic function. Based on the comment of the source code , "I...

...g I can think about is to learn how LLVM Backend works because LLVM Backend handles these things. But I'm not familiar with Backend. After reading some source code and online tutorials, I think a Backend is too much for my purpose. I really appreciate that if someone can give me hints. Thanks Xiangyang -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150424/7eec662e/attachment.html>

...ack(ArgIn_copy); } } After checking the recursivelyDeleteUnusedNodes() in DAGCombinner.cpp, this function will delete the unused node and it does not care about the other attributes. I must have something wrong. I appreciate if you can point it out. Any suggestion is appreciable. Regards, Xiangyang -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160131/774a557b/attachment.html>

...6_ty>, will this make difference for the backend? Suppose my backend has three types of register: i16, i32, i64. When I check the debug information, I can see LLVM tries to use i32 to lower the parameter to build SDAG. But why it chooses i32 instead of i64? Any input is appreciable. Regards, Xiangyang -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160321/2778a8a1/attachment.html>

Hi, I want to define an intrinsic function as terminator instruction of one basic block, is this doable? If so, what attribute should I attach to this intrinsic function? Any input is appreciable. Regards, Xiangyang -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160228/f8a2062b/attachment.html>