Displaying 7 results from an estimated 7 matches for "xform_24_sync".
2008 Aug 22
3
[LLVMdev] Implementing llvm.memory.barrier on PowerPC
...==============================
> --- lib/Target/PowerPC/PPCInstrInfo.td (revision 54985)
> +++ lib/Target/PowerPC/PPCInstrInfo.td (working copy)
> @@ -773,6 +773,10 @@
> [(store F8RC:$frS, xaddr:$dst)]>;
> }
>
> +let isBarrier = 1 in
> +def SYNC : XForm_24_sync<31, 598, (outs), (ins),
> + "sync", LdStSync,
> + [(int_ppc_sync)]>;
>
> //===----------------------------------------------------------------------===//
> // PPC32 Arithmetic Instructions.
> @@ -1357,5 +1361,13 @@...
2008 Aug 21
2
[LLVMdev] Implementing llvm.memory.barrier on PowerPC
...td
===================================================================
--- lib/Target/PowerPC/PPCInstrInfo.td (revision 54985)
+++ lib/Target/PowerPC/PPCInstrInfo.td (working copy)
@@ -773,6 +773,10 @@
[(store F8RC:$frS, xaddr:$dst)]>;
}
+let isBarrier = 1 in
+def SYNC : XForm_24_sync<31, 598, (outs), (ins),
+ "sync", LdStSync,
+ [(int_ppc_sync)]>;
//===----------------------------------------------------------------------===//
// PPC32 Arithmetic Instructions.
@@ -1357,5 +1361,13 @@
def : Pat<(extloadf32 xadd...
2008 Aug 22
0
[LLVMdev] Implementing llvm.memory.barrier on PowerPC
...==
>> --- lib/Target/PowerPC/PPCInstrInfo.td (revision 54985)
>> +++ lib/Target/PowerPC/PPCInstrInfo.td (working copy)
>> @@ -773,6 +773,10 @@
>> [(store F8RC:$frS, xaddr:$dst)]>;
>> }
>>
>> +let isBarrier = 1 in
>> +def SYNC : XForm_24_sync<31, 598, (outs), (ins),
>> + "sync", LdStSync,
>> + [(int_ppc_sync)]>;
>>
>> //
>> =
>> =
>> =
>> ----------------------------------------------------------------------=
>> ==//...
2008 Aug 21
0
[LLVMdev] Implementing llvm.memory.barrier on PowerPC
On Aug 19, 2008, at 7:18 AMPDT, Gary Benson wrote:
> Hi all,
>
> I'm trying to implement llvm.memory.barrier on PowerPC. I've modelled
> my patch (attached) on the implementation in X86, but when I try and
> compile my test file (also attached) with llc I get the error "Cannot
> yet select: 0x10fa4ad0: ch = MemBarrier 0x10fa4828, 0x10fa4c68,
> 0x10fa4be0,
2008 Aug 21
0
[LLVMdev] Implementing llvm.memory.barrier on PowerPC
This looks OK to check in, do you have write access?
On Aug 21, 2008, at 6:38 AMPDT, Gary Benson wrote:
> Dale Johannesen wrote:
>> On Aug 19, 2008, at 7:18 AMPDT, Gary Benson wrote:
>>> I'm trying to implement llvm.memory.barrier on PowerPC. I've
>>> modelled my patch (attached) on the implementation in X86, but
>>> when I try and compile my test
2008 Aug 19
2
[LLVMdev] Implementing llvm.memory.barrier on PowerPC
Hi all,
I'm trying to implement llvm.memory.barrier on PowerPC. I've modelled
my patch (attached) on the implementation in X86, but when I try and
compile my test file (also attached) with llc I get the error "Cannot
yet select: 0x10fa4ad0: ch = MemBarrier 0x10fa4828, 0x10fa4c68,
0x10fa4be0, 0x10fa4be0, 0x10fa4be0, 0x10fa4be0". This presumably
means my "membarrier"
2009 Apr 22
0
[LLVMdev] a very strange question about adding new instrinsic.
...ome test.
I add them in IntrinsicsPowerPC.td
//===--------------------===//
let TargetPrefix = "ppc" in {
def int_ppc_mytest : Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>;
}
//===--------------------===//
I add them in PPCInstrInfo.td
//===--------------------===//
def MYTEST : XForm_24_sync<31, 599, (outs), (ins),
"mytest", LdStSync,
[(int_ppc_mytest)]>;
//===--------------------===//
I insert them in mycase.ll
//===--------------------===//
call void
@llvm.ppc.mytest()
...
declare void @llvm.ppc.mytest(...) nounwind...