search for: xenlog_warning

...- 2007-12-10.orig/xen/arch/x86/traps.c 2007-12-10 09:19:12.000000000 +0100 +++ 2007-12-10/xen/arch/x86/traps.c 2007-12-10 09:24:04.000000000 +0100 @@ -408,10 +408,9 @@ static int do_guest_trap( tb->flags |= TBF_INTERRUPT; if ( unlikely(null_trap_bounce(v, tb)) ) - gdprintk(XENLOG_WARNING, "Unhandled %s fault/trap [#%d] in " - "domain %d on VCPU %d [ec=%04x]\n", - trapstr(trapnr), trapnr, v->domain->domain_id, v->vcpu_id, - regs->error_code); + gdprintk(XENLOG_WARNING, "Unhandled %s fault/tra...

...unlikely(!((op->flags & GNTMAP_readonly) ? - get_page(mfn_to_page(frame), rd) : - get_page_and_type(mfn_to_page(frame), rd, - PGT_writable_page))) ) - { - if ( !rd->is_dying ) - gdprintk(XENLOG_WARNING, "Could not pin grant frame %lx\n", frame); - rc = GNTST_general_error; - goto undo_out; - } - - if ( op->flags & GNTMAP_host_map ) - { - rc = create_grant_host_mapping(op->host_addr, frame, op- >flags); - if ( rc != GNTST_okay ) -...

...er); @@ -995,7 +997,8 @@ int hvm_set_efer(uint64_t value) value &= ~EFER_LMA; - if ( !hvm_efer_valid(value, EFER_FFXSE | EFER_LME | EFER_NX | EFER_SCE) ) + if ( !hvm_efer_valid(value, + EFER_FFXSE | EFER_LMSLE | EFER_LME | EFER_NX | EFER_SCE) ) { gdprintk(XENLOG_WARNING, "Trying to set reserved bit in " "EFER: %"PRIx64"\n", value); --- 2010-05-04.orig/xen/arch/x86/hvm/svm/svm.c 2010-04-12 11:28:20.000000000 +0200 +++ 2010-05-04/xen/arch/x86/hvm/svm/svm.c 2010-05-04 13:23:02.000000000 +0200 @@ -57,6 +57,11 @@ u32 s...

...ch/x86/hvm/io.c b/xen/arch/x86/hvm/io.c index deb7b92..bd751d1 100644 --- a/xen/arch/x86/hvm/io.c +++ b/xen/arch/x86/hvm/io.c @@ -298,7 +298,11 @@ void hvm_io_assist(ioreq_t *p) } if ( p->state == STATE_IOREQ_NONE ) + { + if ( !msix_post_handler(curr) ) + gdprintk(XENLOG_WARNING, "msix_post_handler error\n"); vcpu_end_shutdown_deferral(curr); + } } static int dpci_ioport_read(uint32_t mport, ioreq_t *p) diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index 4826b4a..7178de9 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/v...

Hi, This is the fifth version of this patch series. With the Versatile Express TC2, it''s possible to boot only with A7 or A15. If the user choose to boot with only A7, the CPU ID will start at 0x100. As Xen relies on it to set the logical ID and the GIC, it won''t be possible to use Xen with this use case. This patch series is divided in 3 parts: - Patch 1: prepare Xen

George has release acked all of these. Otherwise mostly minor updates this time around. Summary: A == acked, M == modified A xen: arm64: Add 8250 earlyprintk support A xen: arm64: Add Basic Platform support for APM X-Gene Storm. A xen: arm64: Add APM implementor id to processor implementers. M xen: arm: add a quirk to handle platforms with unusual GIC layout A xen: arm: allow platform

Remove visibility of the FFXSR CPUID bit to an HVM guest. This patch allows HVM Windows x64 to install/boot on AMD-V platforms. This patches applies cleanly to xen-unstable 13743. Please apply to xen-unstable/3.0.5. If possible, pls apply to xen-3.0.4-testing. --Tom thomas.woller@amd.com AMD Corporation 5204 E. Ben White Blvd. UBC1 Austin, Texas 78741 +1-512-602-0059

..... Reading symbols from /root/xen-4.3.0/xen/xen-syms...done. (gdb) list *0xffff82c4c0186ae1 0xffff82c4c0186ae1 is in do_general_protection (traps.c:2597). 2592 case MSR_EFER: 2593 rdmsr_normal: 2594 /* Everyone can read the MSR space. */ 2595 /* gdprintk(XENLOG_WARNING,"Domain attempted RDMSR %p.\n", 2596 _p(regs->ecx));*/ 2597 if ( rdmsr_safe(regs->ecx, msr_content) ) 2598 goto fail; 2599 regs->eax = (uint32_t)msr_content; 2600 regs->edx = (uint32_t)(...

Hi, V6: The only change from V5 is in patch #6: - changed comment to reflect autoxlate - removed a redundant ASSERT - reworked logic a bit so that get_page_from_gfn() is called with NULL for p2m type as before. arm has ASSERT wanting it to be NULL. Tim: patch 4 needs your approval. Daniel: patch 5 needs your approval. These patches implement PVH dom0. Patches 1 and 2

...hpet_sbdf.iommu = iommu; + break; + } + /* set device id of hpet */ if ( hpet_sbdf.iommu || (hpet_sbdf.cmdline && hpet_sbdf.id != special->handle) ) @@ -777,12 +813,10 @@ static u16 __init parse_ivhd_device_special( printk(XENLOG_WARNING "Only one IVHD HPET entry is supported\n"); break; } + hpet_sbdf.id = special->handle; - if ( !hpet_sbdf.cmdline ) - { - hpet_sbdf.bdf = bdf; - hpet_sbdf.seg = seg; - } + hpet_sbdf.bdf = bdf; + hpet...

...) itself seems prepared for this situation, as failures to grab the target page due to a dying domain are correctly handled: if ( !get_page_and_type(mfn_to_page(d_frame), dd, PGT_writable_page) ) { if ( !test_bit(_DOMF_dying, &dd->domain_flags) ) gdprintk(XENLOG_WARNING, "Could not get dst frame %lx \n", d_frame); rc = GNTST_general_error; goto error_out; } In our testing we believe that we''re following this path (_DOMF_dying is set and rc == GNTST_general_error) and that we handle the failure correctly. The corresp...

I''m afraid this series is rather a grab bag and it is distressingly large at this stage. With this series I can boot an Xgene board until it fails to find its SATA controller. This is a dom0 issue for which patches are pending from APM (/me nudges Anup). As well as the APM specific platform stuff there are also some generic improvements which were either necessary or useful during this

...3,7 +473,7 @@ ir_ctrl = iommu_ir_ctrl(iommu); if ( ir_ctrl->iremap_maddr == 0 ) { - ir_ctrl->iremap_maddr = alloc_pgtable_maddr(); + ir_ctrl->iremap_maddr = alloc_pgtable_maddr(NULL); if ( ir_ctrl->iremap_maddr == 0 ) { dprintk(XENLOG_WARNING VTDPREFIX, diff -r 5fd51e1e9c79 xen/drivers/passthrough/vtd/iommu.c --- a/xen/drivers/passthrough/vtd/iommu.c Wed Nov 05 10:57:21 2008 +0000 +++ b/xen/drivers/passthrough/vtd/iommu.c Tue Nov 18 17:37:31 2008 +0900 @@ -148,7 +148,7 @@ root = &root_entries[bus]; if ( !root_present(*root...

This series of patches fix the mistake for debug exception(#DB), overflow exception(#OF) and INT3(#BP), INTn instruction emulation. Introduce new function vmx_inject_sw_exception() which deliver the software excetion, software interrupt and privileged software exception. Split hardware exception as a seperate function(old function vmx_inject_hw_exception()). Also Passed down intruction length

Changes from v1: - Define new struct hvm_trap to represent information of trap, include instruction length. - Renames hvm_inject_exception to hvm_inject_trap. Then define a couple of wrappers around that function for existing callers, so that their parameter lists actually *shrink*. This series of patches fix the mistake for debug exception(#DB), overflow exception(#OF) and INT3(#BP),

Hello, I''m new to Xen and especially to the hypervisor code. I''m working off a 3.0.4.1 base and have the following questions regarding the memory management code for an x86, 32-bit platform (capable of supporting PAE). I''m doing some research into providing grant table hypercall support from a Windows 2003 HVM. I have made all the necessary changes to allow the

...PIC_ACCESSES ) nvcpu->nv_vmexit_pending = 1; break; + case EXIT_REASON_TPR_BELOW_THRESHOLD: + ctrl = __n2_exec_control(v); + if ( ctrl & CPU_BASED_TPR_SHADOW ) + nvcpu->nv_vmexit_pending = 1; + break; default: gdprintk(XENLOG_WARNING, "Unknown nested vmexit reason %x.\n", exit_reason); -- 1.7.1

>>> On 20.05.14 at 18:25, <mike at estone.ca> wrote: > I've added iommu=debug to the XEN CMD Line under grub. > Attached is the xl dmesg log and system dmesg. Okay, this at least clarifies there is a (relatively big) RMRR. There is a change to the handling of these among the ones that'll become 4.3.3 - mind giving

...1].addr >= e) ) + { + e820->map[i].size += e - s; + return 1; + } + + if ( rs >= e ) + break; + + if ( re > s ) + return 0; + } + + if ( e820->nr_map >= ARRAY_SIZE(e820->map) ) + { + printk(XENLOG_WARNING "E820: overflow while adding region" + " %"PRIx64"-%"PRIx64"\n", s, e); + return 0; + } + + memmove(e820->map + i + 1, e820->map + i, + (e820->nr_map - i) * sizeof(*e820->map)); + + e820->nr_map++; +...

1: IOMMU: properly check whether interrupt remapping is enabled 2: AMD IOMMU: only disable when certain IVRS consistency checks fail 3: VT-d: deal with 5500/5520/X58 errata Patch 1 and 2 are version 2 of a previously submitted, then withdrawn patch following up after XSA-36. Patch 3 is version 3 of a patch previously sent by Malcolm and Andrew. Signed-off-by: Jan Beulich