search for: xenlog_debug

Hi all, I had posted about MCA support for Intel64 before. It had only a function to log the MCA error data received from hypervisor. http://lists.xensource.com/archives/html/xen-devel/2008-09/msg00876.html I attach patches that support not only error logging but also Page Offlining function. The page where an MCA occurs will offline and not reuse. A new flag ''PGC_reserved''

When in SYS_STATE_suspend, and going through the cpu_disable_scheduler path, save a copy of the current cpu affinity, and mark a flag to restore it later. Later, in the resume process, when enabling nonboot cpus restore these affinities. v2: Fix formatting problems. remove early return in cpu_disable_scheduler() path. v3: Fix remaining errant tab Move restore_vcpu_affinity() to thaw_domains(),

...= dmar_readq(iommu->reg, DMAR_ECAP_REG); - dprintk(XENLOG_INFO VTDPREFIX, - "drhd->address = %"PRIx64"\n", drhd->address); - dprintk(XENLOG_INFO VTDPREFIX, "iommu->reg = %p\n", iommu->reg); + drhd->iommu = iommu; + + dprintk(XENLOG_DEBUG VTDPREFIX, + "drhd->address = %"PRIx64" iommu->reg = %p\n", + drhd->address, iommu->reg); + dprintk(XENLOG_DEBUG VTDPREFIX, + "cap = %"PRIx64" ecap = %"PRIx64"\n", iommu->cap, iommu->ecap); +...

...d idle vcpu on cpu0 then execute this + * handler immediately. + * + * If vcpu0 is already running on cpu0, this softirq is not triggered + */ +static void pm_softirq(void) +{ + int cpu = smp_processor_id(); + struct vcpu *v = dom0->vcpu[0]; + struct cpu_user_regs *regs; + + pmprintk(XENLOG_DEBUG, "In pm_softirq\n"); + /* only cpu0 handles this irq for now */ + if (cpu != 0) + return; + + pmprintk(XENLOG_DEBUG, "handled by cpu0\n"); + /* Wait vcpu0/dom0 to be paused */ + while ( !atomic_read(&v->pause_count) ) + cpu_relax(); + + /*...

In testing our implementation of the hypervisor copy based backend- >frontend networking changes, we see what I believe are spurious warning messages during the shutdown of the frontend domain: (XEN) /export/build/schuster/xvm-gate/xen.hg/xen/include/asm/mm.h: 189:d0 Error pfn 30e290: rd=ffff830000fcf100, od=ffff830000fcf100, caf=00000000, taf=0000000000000000 (XEN) Xen call trace:

This patch series implements SMP boot for arch/arm, as far as getting all CPUs up and running the idle loop. Changes from v1: - moved barriers out of loop in udelay() - dropped broken GIC change in favour of explanatory comment - made the increment of ready_cpus atomic (I couldn''t move the increment to before signalling the next CPU because the PT switch has to happen between

From: Zhang Xiantao <xiantao.zhang@intel.com> With virtual EPT support, L1 hyerpvisor can use EPT hardware for L2 guest''s memory virtualization. In this way, L2 guest''s performance can be improved sharply. According to our testing, some benchmarks can show > 5x performance gain. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Zhang Xiantao (11):

Hello everyone, this is the fourth version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See