search for: xconc

...ze memory writes by the compiler before an I/O + * instruction. In addition, even input operations may clobber + * hardware mapped memory. + */ + +static inline void vmi_outl(const VMI_UINT32 value, const VMI_UINT16 port) +{ + vmi_wrap_call( + OUT, "out %0, %w1", + VMI_NO_OUTPUT, + 2, XCONC("a"(value), "d"(port)), + VMI_CLOBBER_EXTENDED(ZERO_RETURNS, "memory")); +} + +static inline void vmi_outb(const VMI_UINT8 value, const VMI_UINT16 port) +{ + vmi_wrap_call( + OUTB, "outb %b0, %w1", + VMI_NO_OUTPUT, + 2, XCONC("a"(value), "d...

...ze memory writes by the compiler before an I/O + * instruction. In addition, even input operations may clobber + * hardware mapped memory. + */ + +static inline void vmi_outl(const VMI_UINT32 value, const VMI_UINT16 port) +{ + vmi_wrap_call( + OUT, "out %0, %w1", + VMI_NO_OUTPUT, + 2, XCONC("a"(value), "d"(port)), + VMI_CLOBBER_EXTENDED(ZERO_RETURNS, "memory")); +} + +static inline void vmi_outb(const VMI_UINT8 value, const VMI_UINT16 port) +{ + vmi_wrap_call( + OUTB, "outb %b0, %w1", + VMI_NO_OUTPUT, + 2, XCONC("a"(value), "d...

..., Cambridge, MA 02139, USA. + * + * Send feedback to zach@vmware.com + * + */ + + +#ifndef _MACH_PROCESSOR_H +#define _MACH_PROCESSOR_H + +#include <vmi.h> + +static inline void vmi_cpuid(const int op, int *eax, int *ebx, int *ecx, int *edx) +{ + vmi_wrap_call( + CPUID, "cpuid", + XCONC("=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)), + 1, "a" (op), + VMI_CLOBBER(FOUR_RETURNS)); +} + +/* + * Generic CPUID function + */ +static inline void cpuid(int op, int *eax, int *ebx, int *ecx, int *edx) +{ + vmi_cpuid(op, eax, ebx, ecx,...

..., Cambridge, MA 02139, USA. + * + * Send feedback to zach@vmware.com + * + */ + + +#ifndef _MACH_PROCESSOR_H +#define _MACH_PROCESSOR_H + +#include <vmi.h> + +static inline void vmi_cpuid(const int op, int *eax, int *ebx, int *ecx, int *edx) +{ + vmi_wrap_call( + CPUID, "cpuid", + XCONC("=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)), + 1, "a" (op), + VMI_CLOBBER(FOUR_RETURNS)); +} + +/* + * Generic CPUID function + */ +static inline void cpuid(int op, int *eax, int *ebx, int *ecx, int *edx) +{ + vmi_cpuid(op, eax, ebx, ecx,...

...ASSEMBLY__ +/* + * Several handy macro definitions used to convert the raw assembler + * definitions here into quoted strings for use in inline assembler + * from C code. + * + * To convert the value of a defined token to a string, XSTR(x) + * To concatenate multiple parameters separated by commas, XCONC() + * To convert the value of a defined value with commas, XCSTR() + * + * These macros are incompatible with -traditional + */ +#define MAKESTR(x) #x +#define XSTR(x) MAKESTR(x) +#define XCONC(args...) args +#define CONCSTR(x...) #x +#define XCSTR(x...) CONCSTR(x) +...

...ASSEMBLY__ +/* + * Several handy macro definitions used to convert the raw assembler + * definitions here into quoted strings for use in inline assembler + * from C code. + * + * To convert the value of a defined token to a string, XSTR(x) + * To concatenate multiple parameters separated by commas, XCONC() + * To convert the value of a defined value with commas, XCSTR() + * + * These macros are incompatible with -traditional + */ +#define MAKESTR(x) #x +#define XSTR(x) MAKESTR(x) +#define XCONC(args...) args +#define CONCSTR(x...) #x +#define XCSTR(x...) CONCSTR(x) +...

...while (0) +#define store_ldt(ldt) do { (ldt) = vmi_get_ldt(); } while (0) + +static inline void vmi_write_gdt(void *gdt, unsigned entry, u32 descLo, u32 descHi) +{ + vmi_wrap_call( + WriteGDTEntry, "movl %2, (%0,%1,8);" + "movl %3, 4(%0,%1,8);", + VMI_NO_OUTPUT, + 4, XCONC(VMI_IREG1(gdt), VMI_IREG2(entry), VMI_IREG3(descLo), VMI_IREG4(descHi)), + VMI_CLOBBER_EXTENDED(ZERO_RETURNS, "memory")); +} + +static inline void vmi_write_ldt(void *ldt, unsigned entry, u32 descLo, u32 descHi) +{ + vmi_wrap_call( + WriteLDTEntry, "movl %2, (%0,%1,8);" +...

...while (0) +#define store_ldt(ldt) do { (ldt) = vmi_get_ldt(); } while (0) + +static inline void vmi_write_gdt(void *gdt, unsigned entry, u32 descLo, u32 descHi) +{ + vmi_wrap_call( + WriteGDTEntry, "movl %2, (%0,%1,8);" + "movl %3, 4(%0,%1,8);", + VMI_NO_OUTPUT, + 4, XCONC(VMI_IREG1(gdt), VMI_IREG2(entry), VMI_IREG3(descLo), VMI_IREG4(descHi)), + VMI_CLOBBER_EXTENDED(ZERO_RETURNS, "memory")); +} + +static inline void vmi_write_ldt(void *ldt, unsigned entry, u32 descLo, u32 descHi) +{ + vmi_wrap_call( + WriteLDTEntry, "movl %2, (%0,%1,8);" +...

...uot; clobber. + * Both setting and disabling interrupts must use memory clobber as well, to + * prevent GCC from reordering memory access around them. + */ +static inline void local_irq_disable(void) +{ + vmi_wrap_call( + DisableInterrupts, "cli", + VMI_NO_OUTPUT, + 0, VMI_NO_INPUT, + XCONC("cc", "memory")); +} + +static inline void local_irq_enable(void) +{ + vmi_wrap_call( + EnableInterrupts, "sti", + VMI_NO_OUTPUT, + 0, VMI_NO_INPUT, + XCONC("cc", "memory")); +} + +static inline void local_irq_restore(const unsigned long flags)...

...uot; clobber. + * Both setting and disabling interrupts must use memory clobber as well, to + * prevent GCC from reordering memory access around them. + */ +static inline void local_irq_disable(void) +{ + vmi_wrap_call( + DisableInterrupts, "cli", + VMI_NO_OUTPUT, + 0, VMI_NO_INPUT, + XCONC("cc", "memory")); +} + +static inline void local_irq_enable(void) +{ + vmi_wrap_call( + EnableInterrupts, "sti", + VMI_NO_OUTPUT, + 0, VMI_NO_INPUT, + XCONC("cc", "memory")); +} + +static inline void local_irq_restore(const unsigned long flags)...

...COPS_H +#define __ASM_MACH_APICOPS_H + +#ifdef CONFIG_X86_LOCAL_APIC +#include <vmi.h> + +static inline void apic_write(unsigned long reg, unsigned long value) +{ + void *addr = (void *)(APIC_BASE + reg); + vmi_wrap_call( + APICWrite, "movl %1, (%0)", + VMI_NO_OUTPUT, + 2, XCONC(VMI_IREG1(addr), VMI_IREG2(value)), + VMI_CLOBBER_EXTENDED(ZERO_RETURNS, "memory")); +} + +#define apic_write_atomic(r,v) apic_write(r,v) + +static inline unsigned long apic_read(unsigned long reg) +{ + unsigned long value; + void *addr = (void *)(APIC_BASE + reg); + vmi_wrap_call...

...COPS_H +#define __ASM_MACH_APICOPS_H + +#ifdef CONFIG_X86_LOCAL_APIC +#include <vmi.h> + +static inline void apic_write(unsigned long reg, unsigned long value) +{ + void *addr = (void *)(APIC_BASE + reg); + vmi_wrap_call( + APICWrite, "movl %1, (%0)", + VMI_NO_OUTPUT, + 2, XCONC(VMI_IREG1(addr), VMI_IREG2(value)), + VMI_CLOBBER_EXTENDED(ZERO_RETURNS, "memory")); +} + +#define apic_write_atomic(r,v) apic_write(r,v) + +static inline unsigned long apic_read(unsigned long reg) +{ + unsigned long value; + void *addr = (void *)(APIC_BASE + reg); + vmi_wrap_call...

...t; +} + +#define rdmsr(msr,val1,val2) \ +do { \ + u64 _val = vmi_rdmsr(msr); \ + val1 = (u32)_val; \ + val2 = (u32)(_val >> 32); \ +} while (0) + +static inline void wrmsr(const u32 msr, const u32 valLo, const u32 valHi) +{ + vmi_wrap_call( + WRMSR, "wrmsr", + VMI_NO_OUTPUT, + 3, XCONC("a"(valLo), "d"(valHi), "c"(msr)), + VMI_CLOBBER_EXTENDED(ZERO_RETURNS, "memory")); +} + +static inline u64 vmi_rdtsc(void) +{ + u64 ret; + vmi_wrap_call( + RDTSC, "rdtsc", + VMI_OREG64 (ret), + 0, VMI_NO_INPUT, + VMI_CLOBBER(TWO_RETURNS)); + r...

...t; +} + +#define rdmsr(msr,val1,val2) \ +do { \ + u64 _val = vmi_rdmsr(msr); \ + val1 = (u32)_val; \ + val2 = (u32)(_val >> 32); \ +} while (0) + +static inline void wrmsr(const u32 msr, const u32 valLo, const u32 valHi) +{ + vmi_wrap_call( + WRMSR, "wrmsr", + VMI_NO_OUTPUT, + 3, XCONC("a"(valLo), "d"(valHi), "c"(msr)), + VMI_CLOBBER_EXTENDED(ZERO_RETURNS, "memory")); +} + +static inline u64 vmi_rdtsc(void) +{ + u64 ret; + vmi_wrap_call( + RDTSC, "rdtsc", + VMI_OREG64 (ret), + 0, VMI_NO_INPUT, + VMI_CLOBBER(TWO_RETURNS)); + r...

...(pfn, VMI_PAGE_PDP, root, base, count) +#define mach_release_pgd(pfn) vmi_release_page(pfn, VMI_PAGE_PDP) +#endif + +static inline void vmi_set_linear_mapping(const int slot, const u32 va, const u32 pages, const u32 ppn) +{ + vmi_wrap_call( + SetLinearMapping, "", + VMI_NO_OUTPUT, + 4, XCONC(VMI_IREG1(slot), VMI_IREG2(va), VMI_IREG3(pages), VMI_IREG4(ppn)), + VMI_CLOBBER(ZERO_RETURNS)); +} + +#define mach_map_linear_pt(num, ptep, pfn) \ + vmi_set_linear_mapping(num+1, (uint32_t)ptep, 1, pfn) +#define mach_map_linear_range(start, pages, pfn) \ + vmi_set_linear_mapping(0, start, pages,...

...(pfn, VMI_PAGE_PDP, root, base, count) +#define mach_release_pgd(pfn) vmi_release_page(pfn, VMI_PAGE_PDP) +#endif + +static inline void vmi_set_linear_mapping(const int slot, const u32 va, const u32 pages, const u32 ppn) +{ + vmi_wrap_call( + SetLinearMapping, "", + VMI_NO_OUTPUT, + 4, XCONC(VMI_IREG1(slot), VMI_IREG2(va), VMI_IREG3(pages), VMI_IREG4(ppn)), + VMI_CLOBBER(ZERO_RETURNS)); +} + +#define mach_map_linear_pt(num, ptep, pfn) \ + vmi_set_linear_mapping(num+1, (uint32_t)ptep, 1, pfn) +#define mach_map_linear_range(start, pages, pfn) \ + vmi_set_linear_mapping(0, start, pages,...

...WallclockUpdated, "xor %%eax, %%eax;", + VMI_OREG1 (ret), + 0, VMI_NO_INPUT, + VMI_CLOBBER(ONE_RETURN)); + return ret; +} + +static inline void vmi_set_alarm(VMI_UINT32 flags, VMI_CYCLES expiry, VMI_CYCLES period) +{ + vmi_wrap_call( + SetAlarm, "", + VMI_NO_OUTPUT, + 5, XCONC(VMI_IREG1(flags), + VMI_IREG2((VMI_UINT32)expiry), VMI_IREG3((VMI_UINT32)(expiry >> 32)), + VMI_IREG4((VMI_UINT32)period), VMI_IREG5((VMI_UINT32)(period >> 32))), + VMI_CLOBBER(ZERO_RETURNS)); +} + +static inline void vmi_cancel_alarm(VMI_UINT32 flags) +{ + vmi_wrap_call( + Canc...

...WallclockUpdated, "xor %%eax, %%eax;", + VMI_OREG1 (ret), + 0, VMI_NO_INPUT, + VMI_CLOBBER(ONE_RETURN)); + return ret; +} + +static inline void vmi_set_alarm(VMI_UINT32 flags, VMI_CYCLES expiry, VMI_CYCLES period) +{ + vmi_wrap_call( + SetAlarm, "", + VMI_NO_OUTPUT, + 5, XCONC(VMI_IREG1(flags), + VMI_IREG2((VMI_UINT32)expiry), VMI_IREG3((VMI_UINT32)(expiry >> 32)), + VMI_IREG4((VMI_UINT32)period), VMI_IREG5((VMI_UINT32)(period >> 32))), + VMI_CLOBBER(ZERO_RETURNS)); +} + +static inline void vmi_cancel_alarm(VMI_UINT32 flags) +{ + vmi_wrap_call( + Canc...