Displaying 8 results from an estimated 8 matches for "x86vbroadcast".
2017 Aug 06
2
VBROADCAST Implementation Issues
...t;>>
>>>>> def BROADCASTR_256B : I<0x21, MRMSrcReg, (outs VR_2048:$dst), (ins
>>>>> GR64:$src),
>>>>> "BROADCASTR_256B\t{$src, $dst|$dst, $src}",
>>>>> [(set VR_2048:$dst, (v64i32 (X86VBroadcast
>>>>> GR64:$src)))],
>>>>> IIC_MOV_MEM>, TA;
>>>>>
>>>>>
>>>>>
>>>>> def: Pat<(v64f32 (X86VBroadcast GR64:$src)),
>>>>> (BROADCASTR_256B GR64:$src)>;
>>>&g...
2017 Aug 07
2
VBROADCAST Implementation Issues
...gt;> def BROADCASTR_256B : I<0x21, MRMSrcReg, (outs VR_2048:$dst), (ins
>>>>>>> GR64:$src),
>>>>>>> "BROADCASTR_256B\t{$src, $dst|$dst, $src}",
>>>>>>> [(set VR_2048:$dst, (v64i32 (X86VBroadcast
>>>>>>> GR64:$src)))],
>>>>>>> IIC_MOV_MEM>, TA;
>>>>>>>
>>>>>>>
>>>>>>>
>>>>>>> def: Pat<(v64f32 (X86VBroadcast GR64:$src)),
>>>>>...
2014 Sep 18
3
[LLVMdev] predicates vs. requirements [TableGen, X86InstrInfo.td]
I tried to add an 'OptForSize' requirement to a pattern in X86InstrSSE.td,
but it appears to be ignored. However, the condition was detected when
specified as a predicate.
So this doesn't work:
def : Pat<(v2f64 (X86VBroadcast (loadf64 addr:$src))), (VMOVDDUPrm addr:
$src)>,
*Requires<[OptForSize**]>*;
But this does:
* let Predicates = [OptForSize] in* {
def : Pat<(v2f64 (X86VBroadcast (loadf64 addr:$src))), (VMOVDDUPrm addr
:$src)>;
}
I see both forms used on some patterns lik...
2017 Aug 07
3
VBROADCAST Implementation Issues
...eg, (outs VR_2048:$dst),
>>>>>>>>>>> (ins GR64:$src),
>>>>>>>>>>> "BROADCASTR_256B\t{$src, $dst|$dst, $src}",
>>>>>>>>>>> [(set VR_2048:$dst, (v64i32 (X86VBroadcast
>>>>>>>>>>> GR64:$src)))],
>>>>>>>>>>> IIC_MOV_MEM>, TA;
>>>>>>>>>>>
>>>>>>>>>>>
>>>>>>>>>>>
>>>>&...
2014 Sep 19
2
[LLVMdev] predicates vs. requirements [TableGen, X86InstrInfo.td]
...el wrote:
> > I tried to add an 'OptForSize' requirement to a pattern in X86InstrSSE.td,
> > but it appears to be ignored. However, the condition was detected when
> > specified as a predicate.
> >
> > So this doesn't work:
> > def : Pat<(v2f64 (X86VBroadcast (loadf64 addr:$src))), (VMOVDDUPrm
> addr:
> > $src)>,
> > *Requires<[OptForSize**]>*;
> >
> > But this does:
> > * let Predicates = [OptForSize] in* {
> > def : Pat<(v2f64 (X86VBroadcast (loadf64 addr:$src))), (VMOVDDUPrm
&...
2011 Mar 18
0
[LLVMdev] Long-Term ISel Design
On Mar 17, 2011, at 9:32 AM, David A. Greene wrote:
> Chris Lattner <clattner at apple.com> writes:
>>> 1. We have special target-specific operators for certain shuffles in X86,
>>> such as X86unpckl.
>
>> It also eliminates a lot of fragility. Before doing this, X86
>> legalize would have to be very careful to specifically form shuffles
>> that
2011 Mar 27
2
[LLVMdev] Long-Term ISel Design
...nd 2 is undef...)
if (...operand 1 is a scalar_to_vector...)
if (...scalar_to_vector operand is a load...)
if (...the load only has one use and is foldable...)
...transform this node to an X86braodcast node...
}
then write the .td pattern as:
(set VR128:$dst, (v8f32 (X86vbroadcast (f32 load addr:$src))))
In addition, I have to write the code to lower a splat_lo-type
thing that comes from a register (can't use VBROADCAST) but I
have to do that no matter what since it's not a legal DAG.
I had to write a whole bunch of manual matching code. This is
error-prone is com...
2011 Mar 17
2
[LLVMdev] Long-Term ISel Design
Chris Lattner <clattner at apple.com> writes:
>> 1. We have special target-specific operators for certain shuffles in X86,
>> such as X86unpckl.
> It also eliminates a lot of fragility. Before doing this, X86
> legalize would have to be very careful to specifically form shuffles
> that it knew isel would turn into (e.g.) unpck operations. Now
> instead of