search for: x86targetasminfo

Hi all, The current repository (revision 56968.) does not compile on my Linux box (with GCC 3.4.6): X86TargetAsmInfo.cpp:41: error: duplicate explicit instantiation of `bool llvm::X86TargetAsmInfo<BaseTAI>::ExpandInlineAsm(llvm::CallInst*) const [with BaseTAI = llvm::TargetAsmInfo]' X86TargetAsmInfo.cpp:43: error: duplicate explicit instantiation of `bool llvm::X86TargetAsmInfo<BaseTAI>::L...

On Thursday 02 October 2008 12:42, David Greene wrote: > But let's say you _could_ write such a pattern (because I can). The input > DAG looks like this: > > 0x391a220: <multiple use> > 0x391c970: v2f64 = scalar_to_vector 0x391a220 srcLineNum= 10 > 0x391ac10: <multiple use> > 0x391c8b0: v2f64 = scalar_to_vector

Hi there, I have this build error on OpenBSD-4.4-current: llvm[3]: Compiling X86TargetAsmInfo.cpp for Release build In file included from /usr/ports/devel/llvm/w-llvm-2.4/llvm-2.4/lib/Target/X86/X 86TargetAsmInfo.cpp:14: /usr/ports/devel/llvm/w-llvm-2.4/llvm-2.4/lib/Target/X86/X86TargetAsmInfo.h: In constructor `llvm::X86TargetAsmInfo<BaseTAI>::X86TargetAsmInfo(const llvm::X86Ta...

...st e-mail to Dale. It's really amazing :) > After comparing the generated assembler code with native gcc code I > think the generated code is fine, just the exception handler info in > the non-code sections is broken/missing. It seems, that EH dwarf information emission is disabled in X86TargetAsmInfo.cpp. Remove the is64Bit() condition near "SupportExceptionHandling = true" line in X86Subtarget::isELF section. Also, don't forget to add --enable-eh switch to llc invocation. You will need to link .S with your native unwinding runtime (so, use g++ to link, not llvm-g++) -- WBR, An...

...nton Korobeynikov wrote: >> After comparing the generated assembler code with native gcc code I >> think the generated code is fine, just the exception handler info in >> the non-code sections is broken/missing. > It seems, that EH dwarf information emission is disabled in > X86TargetAsmInfo.cpp. Remove the is64Bit() condition near > "SupportExceptionHandling = true" line in X86Subtarget::isELF section. > > Also, don't forget to add --enable-eh switch to llc invocation. Just in case it doesn't work the first time:) patch 46029 might be helpful. That made...

...ote: >>> After comparing the generated assembler code with native gcc code I >>> think the generated code is fine, just the exception handler info in >>> the non-code sections is broken/missing. >> It seems, that EH dwarf information emission is disabled in >> X86TargetAsmInfo.cpp. Remove the is64Bit() condition near >> "SupportExceptionHandling = true" line in X86Subtarget::isELF >> section. >> >> Also, don't forget to add --enable-eh switch to llc invocation. > > Just in case it doesn't work the first time:) patch 46029...

...s work, most of which are straight forward but a couple I wanted to check with the group to see what people thought was the best thing to do. In particular, I have made all necessary changes and these are mostly constrained to the files: X86IntelAsmPrinter.[h|cpp] X86TargetAsmInfo.[h|cpp] Making sure the syntax follows Microsoft MASM requirements. The main problem that I have hit is regarding the use of CL register in the shift instructions. The problem is that ATT syntax states that it should be referenced as "%cl" while Intel says just "cl" but...

...forward but a couple I wanted to check with the group to > see what people thought was the best thing to do. In particular, I have made > all necessary changes and these are mostly constrained to the files: > > > >                X86IntelAsmPrinter.[h|cpp] > >                X86TargetAsmInfo.[h|cpp] Sounds good; did you mean to attach a patch? It'll be easier to discuss with that. (The output of "svn diff" is fine.) > The main problem that I have hit is regarding the use of CL register in the > shift instructions. The problem is that ATT syntax states that it sh...

On Wednesday 17 June 2009 00:11, Evan Cheng wrote: > Asm printer. Yes, but where? I can't find it. What do I need to search for? -Dave

> On Wednesday 17 June 2009 00:11, Evan Cheng wrote: >> Asm printer. > > Yes, but where? I can't find it. What do I need to > search for? ViewVC is helpful :- http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/ Look at the X86IntelAsmPrinter.cpp file for code outputting the align, if its not there it maybe in the X86AsmPrinter.cpp file, meaning

...ard but a couple I wanted to check with the group >> to >> see what people thought was the best thing to do. In particular, I have >> made >> all necessary changes and these are mostly constrained to the files: >> >> X86IntelAsmPrinter.[h|cpp] >> >> X86TargetAsmInfo.[h|cpp] > >Sounds good; did you mean to attach a patch? It'll be easier to >discuss with that. (The output of "svn diff" is fine.) Appently the GAS Intel backend has flaws and does not work correctly anyway so the X86IntelAsm backend is designed only to target MASM anyway...

...m/InstrTypes.h U include/llvm/Function.h U tools/bugpoint/CrashDebugger.cpp U tools/bugpoint/Miscompilation.cpp U lib/Analysis/ScalarEvolutionExpander.cpp U lib/CodeGen/ShadowStackCollector.cpp U lib/CodeGen/IntrinsicLowering.cpp U lib/Linker/LinkModules.cpp U lib/Target/X86/X86TargetAsmInfo.cpp U lib/Bitcode/Reader/BitcodeReader.cpp U lib/ExecutionEngine/JIT/JIT.cpp U lib/VMCore/Instructions.cpp U lib/VMCore/Constants.cpp U lib/VMCore/AutoUpgrade.cpp U lib/VMCore/Function.cpp U lib/VMCore/Module.cpp U lib/VMCore/Core.cpp U lib/VMCore/BasicBlock.cpp U lib/...