Displaying 5 results from an estimated 5 matches for "x86reg".
2018 Jan 19
1
Registers for i128 data type not registered in X86
Hi,
I have a set of new registers for x86 which I defined in
X86RegisterInfo.td to be:
def POI0: X86Reg<"poi0", 0>;
def POI1: X86Reg<"poi1", 1>;
def POI2: X86Reg<"poi2", 2>;
def POI3: X86Reg<"poi3", 3>;
def POI4: X86Reg<"poi4", 4>;
def POI5: X86Reg<"poi5", 5>;
def POI6:...
2017 Jul 07
2
Unhandled reg/opcode register encoding VR2048 Error in backend
...>, EVEX;
def VMOV_256B_MR : I<0x7F, MRMDestMem, (outs), (ins i32mem:$dst,
VR2048:$src),
"vmov_256B_mr\t{$src, $dst|$dst, $src}",
[(store (i32 (bitconvert VR2048:$src)), addr:$dst)],
IIC_MOV_MEM>, EVEX;
here i have already define VR2048 in x86registerinfo.td as;
def R256B_0: X86Reg<"R256B_0", 0>;
def R256B_1: X86Reg<"R256B_1", 1>;
def VR2048 : RegisterClass<"X86", [v64i32],
2048, (add R256B_0, R256B_1)
Now when build llvm source i am getting following error:
Unhandle...
2016 Apr 07
2
Inline asm clobber registers name
...“MYReg0”) not its AsmName (“r0”). So to make this work we
should write this assembly:
i32 asm "nop", "~{MYReg0}" ()
I believe that this behavior is not correct. It works because in most
back-ends register definition names and AsmNames are equal (e.g. def EAX :
X86Reg<"eax", ...>) but in AMDGPU we want to have different def-names and
AsmNames.
This might be done by changing core LLVM code or in target-specific
getRegForInlineAsmConstraint()
method. What do you suppose to be better solution?
Thanks,
Sam
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2016 Sep 29
3
Reg units for unaddressable register parts?
On 9/28/2016 7:30 PM, Quentin Colombet wrote:
> Out of curiosity, could describe why this is useful to have such precision in the liveness tracking?
RDF is meant to allow optimizations across the whole function. As a
result, registers may change between basic blocks, and there is code to
recalculate it. Accuracy is required to avoid unnecessary block live-ins.
For example, calculate live-ins
2016 Jul 13
6
IPRA, interprocedural register allocation, question
Vivek,
I apologize if you took my original email as a request for implementation,
I meant to be asking what is already available, I think the answer to that
is the ‘preserves_most’ and ‘preserves_all’ attributes, but I will also
Use ‘regmask’ if those prove to be too sub-optimal.
I am still interested in figuring out the necessary and sufficient conditions
For LLC to do optimal IPRA