Displaying 5 results from an estimated 5 matches for "x86operand".
2013 Jul 16
0
[LLVMdev] [PATCH 2/2] X86: infer immediate forms of bit-test instructions
...// bt{,r,s,..} $n, mem becomes btl $(n % 32), (mem + 4 * (n / 32))
+ if (Name.startswith("bt")
+ && !(Name.endswith("b") || Name.endswith("w") || Name.endswith("l") || Name.endswith("q"))
+ && Operands.size() == 3) {
+ X86Operand &Op1 = *(X86Operand*)Operands.begin()[1];
+ X86Operand &Op2 = *(X86Operand*)Operands.begin()[2];
+
+ if (Op1.isImm() && isa<MCConstantExpr>(Op1.getImm()) &&
+ Op2.isMem() && isa<MCConstantExpr>(Op2.Mem.Disp)) {
+ int64_t Given_imm = cast<MCC...
2010 Jun 21
2
[LLVMdev] MC: Object file specific parsing
..."llvm/MC/MCParser/MCAsmParser.h"
#include "llvm/MC/MCParser/MCParsedAsmOperand.h"
#include "llvm/Support/SourceMgr.h"
#include "llvm/Target/TargetRegistry.h"
-#include "llvm/Target/TargetAsmParser.h"
using namespace llvm;
namespace {
struct X86Operand;
-class X86ATTAsmParser : public TargetAsmParser {
- MCAsmParser &Parser;
+class X86ATTAsmParser {
protected:
unsigned Is64Bit : 1;
private:
- MCAsmParser &getParser() const { return Parser; }
-
- MCAsmLexer &getLexer() const { return Parser.getLexer(); }
-
- void Warning...
2014 Apr 08
2
[LLVMdev] 3.4.1 Release Plans
On Tue, Apr 08, 2014 at 04:08:13PM +0400, Robert Khasanov wrote:
> Hi Reid,
>
> Would you approve your patches r203146 and r202774 to be backported to
> 3.4.1? They fix stability issues in x86 asm.
>
Hi Robert,
I was able to merge r203146, but it used a c++11 feature:
std::string::back() which I replaced with
std::string::at(std::string::size() - 1).
r202774 was not merged,
2020 Jan 21
2
MASM & RIP-relative addressing
Are you asking what the parsing rules are, or how you should modify the LLVM code to achieve that result?
If the latter, you haven’t really given enough detail here. What code, exactly, have you tried modifying? Do you have any ideas for how it could work?
-Eli
From: Eric Astor <epastor at google.com>
Sent: Tuesday, January 21, 2020 2:44 PM
To: Eli Friedman <efriedma at
2019 Dec 09
4
IR inline assembly: the x86 Intel "offset" operator
Hi all,
I'm trying to land (a rebased version of) http://llvm.org/D37461 - which
should make it possible to handle x86 Intel assembly like
mov eax, offset Foo::ptr + 1
(Currently, omitting the +1 works... but offset doesn't work in compound
expressions.)
I'm having trouble figuring out what inline assembly I can emit into the
LLVM IR that will work properly. So far, the closest