search for: x86instrsimd

Displaying 7 results from an estimated 7 matches for "x86instrsimd".

2009 May 01
0
[LLVMdev] RFC: AVX Pattern Specification [LONG]
...d that it make sense to you all. This does look very nice. > I have a Perl script that auto-generates the necessary mutliclass > combinations > as well as the needed base classes depending on what's in the top- > level .td > file. For now, I've named that top-level file X86InstrSIMD.td. > > The Perl script would only be need to run as X86InstrSIMD.td > changes. Thus > its use would be similar to how we use autoconf today. We only run > autoconf / > automake when we update the .ac files, not as part of the build > process. While I agree that we wan...
2009 Apr 30
6
[LLVMdev] RFC: AVX Pattern Specification [LONG]
...t. I'm more concerned about the overall scheme and that it make sense to you all. I have a Perl script that auto-generates the necessary mutliclass combinations as well as the needed base classes depending on what's in the top-level .td file. For now, I've named that top-level file X86InstrSIMD.td. The Perl script would only be need to run as X86InstrSIMD.td changes. Thus its use would be similar to how we use autoconf today. We only run autoconf / automake when we update the .ac files, not as part of the build process. Initially, X86InstrSIMD.td would define only AVX instructions so...
2010 Aug 04
2
[LLVMdev] x86 Vector Shuffle Patterns
...oid VR256:v4i64:$dst, (vector_shuffle:v4i64 VR256:v4i64:$src1, (ld:v4i64 addr:iPTR:$src2)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_memop>>)<<P:Predicate_vperm2f128>><<X:SHUFFLE_get_vperm2f128_imm>>) llvm/lib/Target/X86/X86InstrSIMD.td:1705:6: error: In VyPERM2F128PDirrmi: Cannot specify a transform function for a non-input value! Here the tblgen pattern looks like this: [(set VR256:$dst, (v4i64 (vperm2f128:$src3 VR256:$src1, (v4i64 (memop addr:$src2)))))], and verp...
2010 Aug 05
0
[LLVMdev] x86 Vector Shuffle Patterns
...R256:v4i64:$dst, (vector_shuffle:v4i64 VR256:v4i64:$src1, (ld:v4i64 addr:iPTR:$src2)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_memop>>)<<P:Predicate_vperm2f128>><<X:SHUFFLE_get_vperm2f128_imm>>) > llvm/lib/Target/X86/X86InstrSIMD.td:1705:6: error: In VyPERM2F128PDirrmi: Cannot specify a transform function for a non-input value! It turns out this was a tblgen deficiency. I've got it fixed. This will go upstream as soon as I finish merging 2.7 here. -Dave
2009 May 01
4
[LLVMdev] RFC: AVX Pattern Specification [LONG]
...cross SSE1/2/ > AVX. And SSE3/4. > > I have a Perl script that auto-generates the necessary mutliclass > > combinations > > as well as the needed base classes depending on what's in the top- > > level .td > > file. For now, I've named that top-level file X86InstrSIMD.td. > > > > The Perl script would only be need to run as X86InstrSIMD.td > > changes. Thus > > its use would be similar to how we use autoconf today. We only run > > autoconf / > > automake when we update the .ac files, not as part of the build > > proces...
2010 Aug 05
1
[LLVMdev] x86 Vector Shuffle Patterns
...:v4i64:$dst, (vector_shuffle:v4i64 VR256:v4i64:$src1, (ld:v4i64 addr:iPTR:$src2)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_memop>>)<<P:Predicate_vperm2f128>><<X:SHUFFLE_get_vperm2f128_imm>>) >> llvm/lib/Target/X86/X86InstrSIMD.td:1705:6: error: In VyPERM2F128PDirrmi: Cannot specify a transform function for a non-input value! > > It turns out this was a tblgen deficiency.  I've got it fixed.  This > will go upstream as soon as I finish merging 2.7 here. There's a great chance it's already fixed in ma...
2009 May 01
0
[LLVMdev] RFC: AVX Pattern Specification [LONG]
On Apr 30, 2009, at 3:59 PM, David Greene wrote: > Here's the big RFC. > > > Of course we would not transition away from X86InstrSSE.td until > X86InstrSIMD.td is proven to cover all current uses of SSE correctly. > > The pros of the scheme: > > * Unify all "important" x86 SIMD instructions into one framework and > provide > consistency While almost all of this sounds pretty great to me, since I'm also in the proc...