search for: x86instrfma

Displaying 9 results from an estimated 9 matches for "x86instrfma".

2013 Dec 20
2
[LLVMdev] Commutability of X86 FMA3 instructions.
Hi all, The 213 variant of the FMA3 instructions is currently marked commutable (see X86InstrFMA.td). Is that safe? According to the ISA the FMA3 instructions aren't commutable for non-numeric results, so I'd have thought commuting this would only be valid in fast-math mode? For the curious, the reason that I'm asking is that we currently always select the 213 variant, but this in...
2012 Nov 16
2
[LLVMdev] Operand order in dag pattern matching in td files
Hi, I have a simple question w.r.t the order of operands used in dag pattern matching in target files. Some of them seem intuitive. But I want to get it clarified anyway. I am using a pattern from X86InstrFMA.td in the below example. Consider FMA3 pattern (simplified). let Constraints = "$src1 = $dst" in { multiclass fma3s_rm<bits<8> opc, string OpcodeStr, X86MemOperand x86memop, RegisterClass RC, ValueType OpVT, PatFrag mem_frag, SDPatternOper...
2012 Nov 16
0
[LLVMdev] Operand order in dag pattern matching in td files
...12 13:41, Anitha B Gollamudi <anitha.boyapati at gmail.com> wrote: > Hi, > > I have a simple question w.r.t the order of operands used in dag > pattern matching in target files. Some of them seem intuitive. But I > want to get it clarified anyway. I am using a pattern from > X86InstrFMA.td in the below example. Consider FMA3 pattern > (simplified). > > let Constraints = "$src1 = $dst" in { > multiclass fma3s_rm<bits<8> opc, string OpcodeStr, X86MemOperand x86memop, > RegisterClass RC, ValueType OpVT, PatFrag mem_frag, >...
2013 Dec 20
0
[LLVMdev] Commutability of X86 FMA3 instructions.
...o shows a memory operand variant of the fma that you may want to consider in your patch and testcases. Thanks! On Thu, Dec 19, 2013 at 10:45 PM, Lang Hames <lhames at gmail.com> wrote: > Hi all, > > The 213 variant of the FMA3 instructions is currently marked > commutable (see X86InstrFMA.td). Is that safe? According to the ISA > the FMA3 instructions aren't commutable for non-numeric results, so > I'd have thought commuting this would only be valid in fast-math mode? > > For the curious, the reason that I'm asking is that we currently > always select the...
2013 Dec 20
2
[LLVMdev] Commutability of X86 FMA3 instructions.
...u may want to > consider in your patch and testcases. > > Thanks! > > > On Thu, Dec 19, 2013 at 10:45 PM, Lang Hames <lhames at gmail.com> wrote: >> >> Hi all, >> >> The 213 variant of the FMA3 instructions is currently marked >> commutable (see X86InstrFMA.td). Is that safe? According to the ISA >> the FMA3 instructions aren't commutable for non-numeric results, so >> I'd have thought commuting this would only be valid in fast-math mode? >> >> For the curious, the reason that I'm asking is that we currently >&gt...
2013 Dec 23
2
[LLVMdev] Commutability of X86 FMA3 instructions.
...h and testcases. >> >> Thanks! >> >> >> On Thu, Dec 19, 2013 at 10:45 PM, Lang Hames <lhames at gmail.com> wrote: >>> >>> Hi all, >>> >>> The 213 variant of the FMA3 instructions is currently marked >>> commutable (see X86InstrFMA.td). Is that safe? According to the ISA >>> the FMA3 instructions aren't commutable for non-numeric results, so >>> I'd have thought commuting this would only be valid in fast-math mode? >>> >>> For the curious, the reason that I'm asking is that we c...
2020 Jul 13
2
[Beginner] Understanding Tablegen language
...s need to be an operator? or it can be ValueType or something else? 3. What are keywords like "ins", "outs" and "ops"? They are not mentioned in lang ref manual either. 4. What is a "node" keyword? 5. How are PatFrags used? I see some .td files I see, like X86InstrFMA.td, PatFrag MemFrag is passed as argument to multiclass and then used along with addr:$src3 in it. I really don't understand what this means. Does this mean that whatever comes after PatFrag "object" is substituted as Args in PatFrag? e.g. TargetSelectionDAG defines *def not : PatFr...
2012 Nov 16
1
[LLVMdev] Operand order in dag pattern matching in td files
...itha.boyapati at gmail.com> > wrote: > > Hi, > > > > I have a simple question w.r.t the order of operands used in dag > > pattern matching in target files. Some of them seem intuitive. But I > > want to get it clarified anyway. I am using a pattern from > > X86InstrFMA.td in the below example. Consider FMA3 pattern > > (simplified). > > > > let Constraints = "$src1 = $dst" in { > > multiclass fma3s_rm<bits<8> opc, string OpcodeStr, X86MemOperand > x86memop, > > RegisterClass RC, ValueType OpV...
2012 Nov 08
2
[LLVMdev] X86 Tablegen Description and VEX.W
Hi, A question from r162999 changes: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFMA.td?r1=162999&r2=162998&pathrev=162999 For the multiclass "fma4s", why is "mr" not inherited from "VEX_W" and "MemOp4" like those of "rm" or "rr" ? multiclass fma4s< > ... def mr : FMA4<opc, MRMSrcMem, (outs RC:$dst),...