search for: x86genregisterinfo

Displaying 20 results from an estimated 33 matches for "x86genregisterinfo".

2004 Oct 12
2
[LLVMdev] GenRegisterInfo.h.inc
Hi all, I cannot figure out why is named GenRegisterInfo.h.inc and not GenRegisterInfo.inc ... Is it for a dependency problem? Back again to compilation problems under win32 with VC llvm\lib\Analysis\DataStructure\Local.cpp(628) : error C2105: '--' needs l-value the line is: Result.mergeWith(getValueDest(**--CS.arg_end())); Can I submit patches for mutate it in something like:
2004 Oct 12
0
[LLVMdev] GenRegisterInfo.h.inc
On Tue, 12 Oct 2004, Paolo Invernizzi wrote: > Hi all, > I cannot figure out why is named GenRegisterInfo.h.inc and not > GenRegisterInfo.inc ... > Is it for a dependency problem? I'm not sure what you're saying here. In the X86 backend, for example, we generate both X86GenRegisterInfo.h.inc and X86GenRegisterInfo.inc. The former is #included into X86RegisterInfo.h and the latter is #included into X86RegisterInfo.cpp. Does this make sense? They are both correct. > Back again to compilation problems under win32 with VC > > llvm\lib\Analysis\DataStructure\Local.cpp(628...
2004 Aug 13
1
[LLVMdev] tblgen: Assertion failed: "Buffer[Length-1] == '"'", file FileLexer.l, line 114
...ers I got this error: ------------------------------- gmake[3]: Entering directory `/usr/local/src/llvm/lib/Target/X86' Building X86.td register information header with tblgen tblgen: Assertion failed: "Buffer[Length-1] == '"'", file FileLexer.l, line 114 gmake[3]: *** [X86GenRegisterInfo.h.inc] Abort trap (core dumped) gmake[3]: Leaving directory `/usr/local/src/llvm/lib/Target/X86' gmake[2]: *** [all] Error 1 gmake[2]: Leaving directory `/usr/local/src/llvm/lib/Target' gmake[1]: *** [Target/.makeall] Error 2 gmake[1]: Leaving directory `/usr/local/src/llvm/lib' gmake:...
2006 Mar 29
1
[LLVMdev] CVS currently broken - don't update
...ncluded from /usr/home/llvm/obj/../lib/Target/X86/X86.td:100: Included from /usr/home/llvm/obj/../lib/Target/X86/X86InstrInfo.td:2431: Parsing /usr/home/llvm/obj/../lib/Target/X86/X86InstrSSE.td:287: Invalid def 'int_x86_sse2_add_sd'! gmake[3]: *** [/usr/home/llvm/obj/lib/Target/X86/Debug/X86GenRegisterInfo.h.inc.tmp] Error 1
2007 Apr 06
5
[LLVMdev] Register Alias Sets
I notice that in X86GenRegisterInfo.inc, the AliasSets do not include the register being queried. For example: const unsigned RAX_AliasSet[] = { X86::EAX, X86::AX, X86::AL, X86::AH, 0 }; const unsigned EAX_AliasSet[] = { X86::RAX, X86::AX, X86::AL, X86::AH, 0 }; This makes it hard to do set comparisons. RAX and EAX really...
2007 Jun 12
1
[LLVMdev] LLVM binaries for Windows and more
...4244: 'argument' : conversion from 'uint64_t' to 'int', possible loss of data ..\..\lib\Target\X86\X86RegisterInfo.cpp(1185) : warning C4244: 'argument' : conversion from 'int64_t' to 'int', possible loss of data c:\Eigenes\compiler\llvm-2.0\win32\x86\X86GenRegisterInfo.inc(805) : warning C4065: switch statement contains 'default' but no 'case' labels C:\eigenes\compiler\vcc2005\VC\include\xutility(2282) : warning C4996: 'std::_Copy_opt' was declared deprecated C:\eigenes\compiler\vcc2005\VC\include\xutility(2270) : see declaration...
2005 May 11
0
[LLVMdev] LLVM 1.5 Release Plan
...header with tblgen/root/devel/llvm-obj/Debug/bin/tblgen: relocation error: /root/devel/llvm-obj/De bug/bin/tblgen: symbol _ZNSs4_Rep26_M_set_length_and_sharableEj, version GLIBCXX_3.4 not defined in file libstdc++.so.6 with link time reference make[3]: *** [/root/devel/llvm-obj/lib/Target/X86/Debug/X86GenRegisterInfo.h.inc.tmp] Error 127 make[3]: Leaving directory `/root/devel/llvm-obj/lib/Target/X86' make[2]: *** [X86/.makeall] Error 2 make[2]: Leaving directory `/root/devel/llvm-obj/lib/Target' make[1]: *** [Target/.makeall] Error 2 make[1]: Leaving directory `/root/devel/llvm-obj/lib' make: *** [...
2013 Oct 28
2
[LLVMdev] Are Opcode and register mappings exposed anywhere?
...stPrinter::getRegisterName() are static, public members. It would still be handy to expose an enum somewhere. This is to support something like: if (Inst.getOpcode() == X86::CALL64r) { if (Inst.getOperand(0).getReg() == X86::RIP) { // ... } } E.g., exposing some of the tablegened enums in X86GenRegisterInfo.inc and X86GenInstrInfo.inc would be very handy. Steve > > > On Oct 28, 2013 12:03 PM, "Stephen Checkoway" <s at pahtak.org> wrote: > I'm iterating over MCInsts and I'd like to examine particular instructions. For example, I'd like to look at all x86 CALL...
2017 Jul 27
2
Purpose of various register classes in X86 target
Hello everyone, I noticed that there are several register classes defined in X86 target and many of them are overlapping. Is there a list of all X86 register classes documented somewhere? I found many listed in X86GenRegisterInfo.inc(generated by tablegen) but unsure if that is the complete list. Also, is there documentation on the role and purpose of these classes and how the X86 backend decides which class to choose when generating machine code? The comments in X86RegisterInfo.td didn't help much to fully understand a...
2005 May 10
4
[LLVMdev] LLVM 1.5 Release Plan
Dear LLVMers, Here is the current, tentative schedule for LLVM 1.5: 1. We are hoping to have all relevant features and bug fixes into mainline CVS by Friday of this week. For those of you with commit access, please plan to have all of your changes for LLVM 1.5 committed by 9 am (CST) this Friday. If you need more time, please email the list. 2. On Friday, I will be making the 1.5 release
2017 Jan 09
5
RFC: Dynamically Allocated "Callee Saved Registers" Lists
...Open Issue Machine Instructions (MI) have intermediate representation that can be printed and later on parsed to recreate the MIs. MI printer and parser expect the Register Mask array pointer to point to a predefined (static) list of RegMasks. Those lists are retrieved from auto generated file x86GenRegisterInfo.inc using the functions: getRegMasks() and getRegMaskNames(). However, since we create a dynamically allocated register mask, its pointer will not reside in the static lists and no corresponding name could be found. In that case, the MIPrinter will fail to emit the RegMask Name. I would appreciate...
2017 Jan 11
2
RFC: Dynamically Allocated "Callee Saved Registers" Lists
...Open Issue Machine Instructions (MI) have intermediate representation that can be printed and later on parsed to recreate the MIs. MI printer and parser expect the Register Mask array pointer to point to a predefined (static) list of RegMasks. Those lists are retrieved from auto generated file x86GenRegisterInfo.inc using the functions: getRegMasks() and getRegMaskNames(). However, since we create a dynamically allocated register mask, its pointer will not reside in the static lists and no corresponding name could be found. In that case, the MIPrinter will fail to emit the RegMask Name. I would appreciate...
2011 Dec 02
0
[LLVMdev] llvm3.0 compile problem
hi, I just downloaded llvm3.0 source, and compile it with cmake+msvc2008 ,but failed. the error message was missing X86GenRegisterInfo.inc such kind of files. I can build llvm2.9 with cmake+msvc2008 well, why can't I build llvm3.0 with same method. thanks
2007 Apr 07
0
[LLVMdev] Register Alias Sets
On Apr 6, 2007, at 4:51 PM, David Greene wrote: > I notice that in X86GenRegisterInfo.inc, the AliasSets do not > include the register being queried. For example: > > const unsigned RAX_AliasSet[] = { X86::EAX, X86::AX, X86::AL, > X86::AH, > 0 }; > const unsigned EAX_AliasSet[] = { X86::RAX, X86::AX, X86::AL, > X86::AH, 0 }; > > This makes it hard...
2013 Oct 29
0
[LLVMdev] Are Opcode and register mappings exposed anywhere?
...members. It would > still be handy to expose an enum somewhere. This is to support something > like: > > if (Inst.getOpcode() == X86::CALL64r) { > if (Inst.getOperand(0).getReg() == X86::RIP) { > // ... > } > } > > E.g., exposing some of the tablegened enums in X86GenRegisterInfo.inc and > X86GenInstrInfo.inc would be very handy. > > Steve > > > > > > > On Oct 28, 2013 12:03 PM, "Stephen Checkoway" <s at pahtak.org> wrote: > > I'm iterating over MCInsts and I'd like to examine particular > instructions. For exam...
2013 Oct 28
0
[LLVMdev] Are Opcode and register mappings exposed anywhere?
See the source here: https://github.com/earl/llvm-mirror/blob/master/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp. It looks like getRegisterName might do what you want, but I don't know where it's coming from. (Whether it's a function or a member of a super class. Hopefully, if it's a member, it's public.) PS Sorry for the duplicate, Stephen. I forgot to CC the list. On
2005 May 11
2
[LLVMdev] LLVM 1.5 Release Plan
...h tblgen/root/devel/llvm-obj/Debug/bin/tblgen: relocation error: /root/devel/llvm-obj/De > bug/bin/tblgen: symbol _ZNSs4_Rep26_M_set_length_and_sharableEj, version GLIBCXX_3.4 not defined in file libstdc++.so.6 with link time reference > make[3]: *** [/root/devel/llvm-obj/lib/Target/X86/Debug/X86GenRegisterInfo.h.inc.tmp] Error 127 > make[3]: Leaving directory `/root/devel/llvm-obj/lib/Target/X86' > make[2]: *** [X86/.makeall] Error 2 > make[2]: Leaving directory `/root/devel/llvm-obj/lib/Target' > make[1]: *** [Target/.makeall] Error 2 > make[1]: Leaving directory `/root/devel/llvm...
2012 Jan 20
1
[LLVMdev] Problem with cross class joins in the RegisterCoalescer
Thanks! Our bug is now fixed. Our getMatchingSuperRegClass is huge (more than 300 lines), messy, and incomplete. > Or you could just rebase. On trunk, TableGen writes this difficult function for you. That in itself would be a compelling reason to get the rebase to trunk done. I just curious how large the generated version will be. :-) /Patrik Hägglund -----Original Message----- From: Jakob
2013 Oct 28
2
[LLVMdev] Are Opcode and register mappings exposed anywhere?
I'm iterating over MCInsts and I'd like to examine particular instructions. For example, I'd like to look at all x86 CALL64m instructions. I may be missing something, but it seems like my only option is to use MCInstPrinter::getOpcodeName and compare strings. (Of course, I could iterate through the opcodes and build up a table of the ones I'm interested in to avoid string
2004 Aug 17
2
[LLVMdev] tblgen: Assertion failed: "Buffer[Length-1] == '"'", file FileLexer.l, line 114
...> > gmake[3]: Entering directory `/usr/local/src/llvm/lib/Target/X86' > > Building X86.td register information header with tblgen > > tblgen: Assertion failed: "Buffer[Length-1] == '"'", file FileLexer.l, >line > > 114 > > gmake[3]: *** [X86GenRegisterInfo.h.inc] Abort trap (core dumped) > > gmake[3]: Leaving directory `/usr/local/src/llvm/lib/Target/X86' > > gmake[2]: *** [all] Error 1 > > gmake[2]: Leaving directory `/usr/local/src/llvm/lib/Target' > > gmake[1]: *** [Target/.makeall] Error 2 > > gmake[1]: Leavi...