Displaying 3 results from an estimated 3 matches for "x86geninstinfo".
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x86geninstrinfo
2011 Feb 01
1
[LLVMdev] X86 Instructions on LLVM
Hi all,
Just a quick question about X86 instructions inside LLVM. I found it
hard to do one-to-one mapping from the instructions in
X86GenInstInfo.inc to the instructions in the intel Manual. For example,
what instructions are DIVR_F32m and DIVR_F64m mapped to in the intel
manual? It would be great if there is some docs about the X86 instructions.
Thanks tons!
Bin
2004 Jun 07
2
[LLVMdev] Emitting assembler code
...file define:
def Pseudo : Format<0>; def RawFrm : Format<1>;
and there are parallel definitions in X86InstrInfo.h:
Pseudo = 0,
RawFrm = 1,
Those definitions are used in codegen, and and TableGen somehow passes the
instruction format information to X86GenInstInfo.inc -- specifically, it
encodes it in the TSFlags field of the TargetInstrDescriptor class.
So the question is: how the information about format should be specified
in .td files? I've tried this:
class Format<bits<5> val> {
bits<5> Value = val;
}
def F1 : Format...
2004 Jun 07
0
[LLVMdev] Emitting assembler code
...t;0>; def RawFrm : Format<1>;
>
> and there are parallel definitions in X86InstrInfo.h:
>
> Pseudo = 0,
> RawFrm = 1,
Exactly.
> Those definitions are used in codegen, and and TableGen somehow passes the
> instruction format information to X86GenInstInfo.inc -- specifically, it
> encodes it in the TSFlags field of the TargetInstrDescriptor class.
Yup, the TSFlags field is defined to hold TargetSpecific flags of whatever
sort you want. Just the thing for holding information about how to print.
> So the question is: how the information about...