search for: x86genasmwriter1

...WriteIMul16Reg ) def max_qb : I<0xF0,MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1,GR32:$src2), "max_qb\t {$dst, $src1,$src2}", [(set GR32:$dst,(X86max_qb GR32:$src1, GR32:$src2))]>,Sched<[WriteIMul16Reg]>,OpSize32 ; when compile LLVM , the error appears. "[ 97%] Updating X86GenAsmWriter1.inc... Unhandled immediate encoding GR32 Unhandled immediate encoding " But when I write the same as the instruction IMUL32rr, there is no error in compiling.(I don't use the EFLAGS at all, so I think it's wrong. Indeed, it made a error when using it.) let Defs = [EFLAGS] in { let...

in LLVM 3.3, file lib/Target/X86/X86GenAsmWriter1.inc is generated for Intel asm syntax. However, there are some lines like below: .... case 16: // ROL64mCL O << ", %cl"; return; break; .... this is wrong, since "%cl" is not Intel syntax. hopefully somebody will fix this. thanks. Jun --------------...

...Knoten "1" (Standardziele). InitializeBuildStatus: "x64\Debug\X86CommonTableGen\X86Commo.1917F16D.tlog\unsuccessfulbuild" wird erstellt, da "AlwaysCreate" angegeben wurde. CustomBuild:   Building X86GenAsmMatcher.inc...   Building X86GenAsmWriter.inc...   Building X86GenAsmWriter1.inc...   Building X86GenCallingConv.inc...   Building X86GenDAGISel.inc...   Building X86GenDisassemblerTables.inc...   Building X86GenEVEX2VEXTables.inc...   Building X86GenFastISel.inc...   Building X86GenGlobalISel.inc...   ... which costs me much time (>30min) on my slow system - and...

I thought we already did write tablegen output to temporary files like X86GenAsmWriter1.inc.tmp first and then diffed them with the real .inc file and conditionally copied. ~Craig On Sat, May 27, 2017 at 11:02 AM, David Blaikie via llvm-dev < llvm-dev at lists.llvm.org> wrote: > > > On Fri, May 26, 2017 at 8:06 PM Zachary Turner via llvm-dev < > llvm-dev at lis...

I'm looking at extending AsmPrinter to pretty-print comments after instructions (I'm adding the necessary fields to MachineInstr to do this). I'm trying to grok AsmWriterEmitter and having a tough go of it. I look at X86GenAsmWriter1.inc (the Intel syntax writer) and understand that there's a case block for printing operands under several switch statements, one per "fragment." I need to recode AsmWriterEmitter to call a function right before it emits the final newline for an instruction to do any instruction po...

...Maybe we do and build systems aren't respecting/noticing this? I'm not sure. > > On Sat, May 27, 2017 at 12:50 PM Craig Topper <craig.topper at gmail.com <mailto:craig.topper at gmail.com>> wrote: > I thought we already did write tablegen output to temporary files like X86GenAsmWriter1.inc.tmp first and then diffed them with the real .inc file and conditionally copied. > > ~Craig > > On Sat, May 27, 2017 at 11:02 AM, David Blaikie via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: > > > On Fri, May 26, 2017 at...

...l.inc +SparcGenInstrInfo.inc +SparcGenRegisterInfo.inc +SparcGenSubtargetInfo.inc diff --git a/lib/Target/X86/.gitignore b/lib/Target/X86/.gitignore new file mode 100644 index 0000000..13e4a62 --- /dev/null +++ b/lib/Target/X86/.gitignore @@ -0,0 +1,11 @@ +X86GenAsmMatcher.inc +X86GenAsmWriter.inc +X86GenAsmWriter1.inc +X86GenCallingConv.inc +X86GenDAGISel.inc +X86GenDisassemblerTables.inc +X86GenEDInfo.inc +X86GenFastISel.inc +X86GenInstrInfo.inc +X86GenRegisterInfo.inc +X86GenSubtargetInfo.inc diff --git a/lib/Target/XCore/.gitignore b/lib/Target/XCore/.gitignore new file mode 100644 index 0000000..9541ccb...

...and build systems aren't respecting/noticing this? I'm not sure. >> >> On Sat, May 27, 2017 at 12:50 PM Craig Topper <craig.topper at gmail.com <mailto:craig.topper at gmail.com>> wrote: >> I thought we already did write tablegen output to temporary files like X86GenAsmWriter1.inc.tmp first and then diffed them with the real .inc file and conditionally copied. >> >> ~Craig >> >> On Sat, May 27, 2017 at 11:02 AM, David Blaikie via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: >> >> >...

...stems aren't respecting/noticing this? I'm not sure. >>> >>> On Sat, May 27, 2017 at 12:50 PM Craig Topper <craig.topper at gmail.com <mailto:craig.topper at gmail.com>> wrote: >>> I thought we already did write tablegen output to temporary files like X86GenAsmWriter1.inc.tmp first and then diffed them with the real .inc file and conditionally copied. >>> >>> ~Craig >>> >>> On Sat, May 27, 2017 at 11:02 AM, David Blaikie via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: >>...

my build environment: Win7 x64 VStudio 2017 Community Edition 15.8.4 (latest) CMake 3.12.1 (x86) git 2.19.0 (latest, x64) Python 2.7.2 (x86) x64 Native Tools Command Prompt for VS 2017 directory structure: test     llvm <-- git clone https://github.com/llvm-mirror/llvm, git checkout release_70       tools         clang <-- git clone https://github.com/llvm-mirror/clang, git checkout

It would be better, because a debug tablegen is slower than an optimized tablegen, but it's still slow and it doesn't address the problem that tablegen runs *at all* when it doesn't really need to. I think if tablegen wasn't running all the time we could incremental builds down from 15 minutes (and that's on my really powerful machine) to under 5, which seemed like a big