Displaying 13 results from an estimated 13 matches for "x86disassemblerdecod".
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x86disassemblerdecoder
2013 Sep 12
1
[LLVMdev] [patch] remove redundant code in X86DisassemblerDecoder.c
there is an if-else code in X86DisassemblerDecoder.c that does exactly the
same thing on both paths. so this patch removes the redundant path.
thanks,
Jun
diff --git a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
index 20e61da..3932ea1 100644
--- a/lib/Target/X86/Disassembler/X86Di...
2010 Dec 16
1
[LLVMdev] x86 disassembler: if-statement with redundant branch
Hi there!
In the x86 disassembler I noticed an if-statement with a
duplicated branch. Are these intended to be identical?
Best regards,
Nicolas Kaiser
--
diff -ur llvm-2.8.orig/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c llvm-2.8/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
--- llvm-2.8.orig/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c 2010-05-06 22:59:00.000000000 +0200
+++ llvm-2.8/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c 2010-12-16 16:24:28.583323293 +0100
@@ -412,11 +412,6 @@...
2014 Mar 31
2
[LLVMdev] registerSize on X86 confused?
Hi,
In file X86DisassemblerDecoder.c, we have function readPrefixes() with
below code:
.....
} else if (insn->mode == MODE_32BIT) {
insn->registerSize = (hasOpSize ? 2 : 4);
insn->addressSize = (hasAdSize ? 2 : 4);
insn->displacementSize = (hasAdSize ? 2 : 4);
insn->immediateSize...
2014 Apr 02
2
[LLVMdev] registerSize on X86 confused?
...ler design is a bit of a mess with regards
to prefixes and operand size.
On Tue, Apr 1, 2014 at 4:43 PM, Jun Koi <junkoi2004 at gmail.com> wrote:
>
>
>
> On Mon, Mar 31, 2014 at 11:48 PM, Jun Koi <junkoi2004 at gmail.com> wrote:
>
>> Hi,
>>
>> In file X86DisassemblerDecoder.c, we have function readPrefixes() with
>> below code:
>>
>> .....
>> } else if (insn->mode == MODE_32BIT) {
>> insn->registerSize = (hasOpSize ? 2 : 4);
>> insn->addressSize = (hasAdSize ? 2 : 4);
>> insn->displacem...
2014 Dec 24
2
[LLVMdev] X86 disassembler is quite broken on handling REX
...b,0xc3"|./Release+Asserts/bin/llvm-mc -disassemble
-triple=x86_64
.text
<stdin>:1:1: warning: invalid instruction encoding
0x41,0x0f,0xeb,0xc3
^
the last example should also return "por %mm3, %mm0", but it fails to
understand the input.
the reason stays with this line in X86DisassemblerDecoder.cpp:
rm |= bFromREX(insn->rexPrefix) << 3;
we can see that we take into account REX.B, but for "por" (0F EB), this
should be ignored.
there are quite a lot of other instructions taking into account REX like
this, while according to the manual, REX should be ignored.
i...
2014 Dec 24
2
[LLVMdev] X86 disassembler is quite broken on handling REX
...xt
>> <stdin>:1:1: warning: invalid instruction encoding
>> 0x41,0x0f,0xeb,0xc3
>> ^
>>
>>
>> the last example should also return "por %mm3, %mm0", but it fails to
>> understand the input.
>>
>> the reason stays with this line in X86DisassemblerDecoder.cpp:
>>
>> rm |= bFromREX(insn->rexPrefix) << 3;
>>
>> we can see that we take into account REX.B, but for "por" (0F EB), this
>> should be ignored.
>>
>> there are quite a lot of other instructions taking into account REX like
>...
2012 Jan 24
0
[LLVMdev] Build Failures
...nalysis::Location&)':
[off-opt] : [llvm] /ptmp/dag/llvm/official/llvm/lib/Analysis/AliasAnalysisCounter.cpp:165:15: error: 'MRString' may be used uninitialized in this function [-Werror=uninitialized]
[off-opt] : [llvm] /ptmp/dag/llvm/official/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c: In function 'decode':
[off-opt] : [llvm] /ptmp/dag/llvm/official/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c:129:14: error: 'dec' may be used uninitialized in this function [-Werror=uninitialized]
Note that these have to be optimized builds as the use-before-d...
2013 Sep 12
1
[LLVMdev] bug in X86 disasm code?
hi,
i found this code in X86DisassemblerDecoder.h
#define EA_BASES_32BIT \
ENTRY(EAX) \
ENTRY(ECX) \
ENTRY(EDX) \
ENTRY(EBX) \
ENTRY(sib) \
ENTRY(EBP) \
ENTRY(ESI) \
ENTRY(EDI) \
ENTRY(R8D) \
ENTRY(R9D) \
ENTRY(...
2014 Dec 26
2
[LLVMdev] X86 disassembler & assembler mismatch
.../Release+Asserts/bin/llvm-mc -disassemble
>> -triple=x86_64 --output-asm-variant=1
>> .text
>> <stdin>:1:1: warning: invalid instruction encoding
>> 0x0f,0xc2,0xca,0x17
>>
>
> i am trying to figure out why this bug happens. according to the code in
> X86DisassemblerDecoder.cpp, the last operand of CMPSS is checked against
> TYPE_IMM5 (to be in the range [0, 31]), but i cannot find this TYPE_IMM5
> value anywhere in the definition of CMPSS, as below.
> can somebody please enlighten me?
>
> thanks!
>
> // sse12_cmp_packed - sse 1 & 2 compare...
2014 Dec 26
2
[LLVMdev] X86 disassembler & assembler mismatch
hi,
some instructions mismatch between assembler & disassembler, like below.
it seems this happens with all SSECC related instructions?
thanks,
Jun
$ echo "cmpps xmm1, xmm2, 23" | ./Release+Asserts/bin/llvm-mc -assemble
-triple=x86_64 --output-asm-variant=1 -x86-asm-syntax=intel -show-encoding
.text
cmpps xmm1, xmm2, 23 # encoding: [0x0f,0xc2,0xca,0x17]
$
2020 Jun 28
3
Introducing the binary-level coverage analysis tool bcov
.../sample-binaries/README.md)
might be the easiest way to inspect the patch code.
> bcov depends on capstone, which appears to be a pretty standard disassembly
> tool... It is based on a ~2013 shimmed-down version of LLVM MC and
> LLVM*Disassembler. The generated files (e.g.
> arch/X86/X86DisassemblerDecoder.c)
> get ad-hoc sporadic amendment from contributors over the years.. It is a
> bit
> unfortunate for LLVM that MC and LLVM*Disassembler (Machine Code, including
> assembly/disassembly libraries) cannot be easily adapted by downstream
> users..... (Well, downstream packages can use...
2020 Jun 26
4
Introducing the binary-level coverage analysis tool bcov
## TL;DR
We introduce bcov, an open-source binary-level coverage analysis tool [1].
The details are discussed in our paper [2], which is accepted to
ESEC/FSE'20. bcov statically instruments x86-64 ELF binaries without
compiler support. It features several techniques that allow it to achieve
high performance, transparency, and flexibility.
For example, running "make
2015 Jul 29
1
[LLVMdev] Error when i am using command make -j4 command in cygwin to compile safecode
...ctory '/home/NIKHILREDDY/WORK/LLVM_OBJ/lib/Target/X86/Disassembler'
llvm[4]: Compiling X86Disassembler.cpp for Release+Asserts build
llvm[3]: Compiling InstCombineVectorOps.cpp for Release+Asserts build
llvm[3]: Building Release+Asserts Archive Library libLLVMAsmPrinter.a
llvm[4]: Compiling X86DisassemblerDecoder.cpp for Release+Asserts build
make[3]: Leaving directory '/home/NIKHILREDDY/WORK/LLVM_OBJ/lib/CodeGen/AsmPrinter'
make[3]: Entering directory '/home/NIKHILREDDY/WORK/LLVM_OBJ/lib/CodeGen/MIRParser'
llvm[3]: Compiling MILexer.cpp for Release+Asserts build
llvm[3]: Compiling Instruc...