Displaying 2 results from an estimated 2 matches for "x86atomicexpandpass".
2014 Aug 15
2
[LLVMdev] Plan to optimize atomics in LLVM
> From my reading of Atomics.rst, it would be sound to reorder (It does not
> say much about load-linked, so I am treating it as a normal load here)
>
>> store seq_cst
>> fence release
>> load-linked monotonic
>
> into
>
>> load-linked monotonic
>> store seq_cst
>> fence release
> Which would make an execution ending in %old_x = %old_y = 0
2014 Aug 18
2
[LLVMdev] Plan to optimize atomics in LLVM
Hi Robin,
On 15 August 2014 21:49, Robin Morisset <morisset at google.com> wrote:
> I have
> attached the corresponding patches; they are not completely ready for review
> (mostly missing tests), I would just like to make sure that the general
> approach seems reasonable.
I've had a quick glance at the patches, and the code seems fairly sane.
But I'm not so sure about