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...ruction, but I'm running into problems due to my lack of x86 encoding/decoding understanding. Hello all. Currently, I'm working on adding my own x86 instruction. I have done this once before; the basic process I used was: 1. Find an unused opcode, e.g. 0xF1 in this table: http://ref.x86asm.net/coder32.html 2. Insert an instruction into lib/Target/X86/X86InstrInfo.td using this opcode. In this case, I used 0xF1, and created the following instruction: def CACHE_OPERAND_B64i : RIi64<0xF1, AddRegFrm, (outs GR64:$unused), (ins i64imm:$b), "cache_operand_b_i...

...I am currently asking two things, if possible, please : 1) Intel Rapid Boot Toolkit [3] 2) Server Board with : a) IOMMU : Intel VT-d2/AMD IOMMU b) ROM chip socketed c) UEFI Firmware c) Numonyx Forte M25P128 [6] I look forward to your answer, Best Regards, Guillaume FORTAINE [0] http://x86asm.net/articles/uefi-hypervisors-winning-the-race-to-bare-metal/ [1] http://www.coreboot.org/AVATT [2] http://news.cnet.com/8301-13556_3-10170884-61.html [3] http://www.intel.com/design/servers/ism/rbt/index.htm [4] http://arstechnica.com/business/news/2007/11/split-personalties-new-hypervisorflash-c...

...I am currently asking two things, if possible, please : 1) Intel Rapid Boot Toolkit [3] 2) Server Board with : a) IOMMU : Intel VT-d2/AMD IOMMU b) ROM chip socketed c) UEFI Firmware c) Numonyx Forte M25P128 [6] I look forward to your answer, Best Regards, Guillaume FORTAINE [0] http://x86asm.net/articles/uefi-hypervisors-winning-the-race-to-bare-metal/ [1] http://www.coreboot.org/AVATT [2] http://news.cnet.com/8301-13556_3-10170884-61.html [3] http://www.intel.com/design/servers/ism/rbt/index.htm [4] http://arstechnica.com/business/news/2007/11/split-personalties-new-hypervisorflash-c...