search for: x86_sse41_pmovsxbd

...for example the SSE4.1 pmovsxbd instruction. One variant takes two XMM registers, while another has a 32-bit memory location as source operand. The latter is quite interesting if you know you're reading from memory anyway, and if it's not 16-byte aligned. It looks like LLVM's Intrinsic::x86_sse41_pmovsxbd expects a v16i8 as source operand though. So how do I achieve using the variant taking a memory operand? Thanks a bunch, Nicolas Capens -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20080801/721d443e...

....1 pmovsxbd instruction. One variant takes two XMM > registers, while another has a 32-bit memory location as source operand. The > latter is quite interesting if you know you're reading from memory anyway, > and if it's not 16-byte aligned. It looks like LLVM's > Intrinsic::x86_sse41_pmovsxbd expects a v16i8 as source operand though. So > how do I achieve using the variant taking a memory operand? A load+insertelement+pmovsx sequence should codegen into a single instruction, but it looks like that isn't working. I guess the pattern-matching magic should kick in and take care of...