Displaying 16 results from an estimated 16 matches for "x86_pf_rsvd".
2020 May 13
2
[PATCH v3 24/75] x86/boot/compressed/64: Unmap GHCB page before booting the kernel
On Tue, Apr 28, 2020 at 05:16:34PM +0200, Joerg Roedel wrote:
> @@ -302,9 +313,13 @@ void do_boot_page_fault(struct pt_regs *regs, unsigned long error_code)
> * - User faults
> * - Reserved bits set
> */
> - if (error_code & (X86_PF_PROT | X86_PF_USER | X86_PF_RSVD)) {
> + if (ghcb_fault ||
> + error_code & (X86_PF_PROT | X86_PF_USER | X86_PF_RSVD)) {
> /* Print some information for debugging */
> - error_putstr("Unexpected page-fault:");
> + if (ghcb_fault)
> + error_putstr("Page-fault on GHCB page:");
>...
2020 May 13
2
[PATCH v3 24/75] x86/boot/compressed/64: Unmap GHCB page before booting the kernel
On Tue, Apr 28, 2020 at 05:16:34PM +0200, Joerg Roedel wrote:
> @@ -302,9 +313,13 @@ void do_boot_page_fault(struct pt_regs *regs, unsigned long error_code)
> * - User faults
> * - Reserved bits set
> */
> - if (error_code & (X86_PF_PROT | X86_PF_USER | X86_PF_RSVD)) {
> + if (ghcb_fault ||
> + error_code & (X86_PF_PROT | X86_PF_USER | X86_PF_RSVD)) {
> /* Print some information for debugging */
> - error_putstr("Unexpected page-fault:");
> + if (ghcb_fault)
> + error_putstr("Page-fault on GHCB page:");
>...
2020 May 13
0
[PATCH v3 24/75] x86/boot/compressed/64: Unmap GHCB page before booting the kernel
...Apr 28, 2020 at 05:16:34PM +0200, Joerg Roedel wrote:
> > @@ -302,9 +313,13 @@ void do_boot_page_fault(struct pt_regs *regs, unsigned long error_code)
> > * - User faults
> > * - Reserved bits set
> > */
> > - if (error_code & (X86_PF_PROT | X86_PF_USER | X86_PF_RSVD)) {
> > + if (ghcb_fault ||
> > + error_code & (X86_PF_PROT | X86_PF_USER | X86_PF_RSVD)) {
> > /* Print some information for debugging */
> > - error_putstr("Unexpected page-fault:");
> > + if (ghcb_fault)
> > + error_putstr("Page-f...
2020 Apr 28
0
[PATCH v3 24/75] x86/boot/compressed/64: Unmap GHCB page before booting the kernel
...D_MASK;
+ end = address + PMD_SIZE;
/*
* Check for unexpected error codes. Unexpected are:
@@ -302,9 +313,13 @@ void do_boot_page_fault(struct pt_regs *regs, unsigned long error_code)
* - User faults
* - Reserved bits set
*/
- if (error_code & (X86_PF_PROT | X86_PF_USER | X86_PF_RSVD)) {
+ if (ghcb_fault ||
+ error_code & (X86_PF_PROT | X86_PF_USER | X86_PF_RSVD)) {
/* Print some information for debugging */
- error_putstr("Unexpected page-fault:");
+ if (ghcb_fault)
+ error_putstr("Page-fault on GHCB page:");
+ else
+ error_putstr("Un...
2020 Jul 14
0
[PATCH v4 14/75] x86/boot/compressed/64: Add page-fault handler
...ge_fault(struct pt_regs *regs, unsigned long error_code)
+{
+ unsigned long address = native_read_cr2();
+
+ /*
+ * Check for unexpected error codes. Unexpected are:
+ * - Faults on present pages
+ * - User faults
+ * - Reserved bits set
+ */
+ if (error_code & (X86_PF_PROT | X86_PF_USER | X86_PF_RSVD))
+ do_pf_error("Unexpected page-fault:", error_code, address, regs->ip);
+
+ /*
+ * Error code is sane - now identity map the 2M region around
+ * the faulting address.
+ */
+ add_identity_map(address & PMD_MASK, PMD_SIZE);
+}
diff --git a/arch/x86/boot/compressed/idt_64.c b/a...
2020 Apr 02
0
[PATCH 14/70] x86/boot/compressed/64: Add page-fault handler
..._read_cr2();
> + unsigned long error_code = regs->orig_ax;
> +
> + /*
> + * Check for unexpected error codes. Unexpected are:
> + * - Faults on present pages
> + * - User faults
> + * - Reserved bits set
> + */
> + if (error_code & (X86_PF_PROT | X86_PF_USER | X86_PF_RSVD))
> + pf_error(error_code, address, regs);
> +
> + /*
> + * Error code is sane - now identity map the 2M region around
> + * the faulting address.
> + */
> + add_identity_map(address & PMD_MASK, PMD_SIZE);
> +}
> diff --git a/arch/x86/boot/compressed/idt_64.c b/ar...
2020 Apr 28
116
[PATCH v3 00/75] x86: SEV-ES Guest Support
Hi,
here is the next version of changes to enable Linux to run as an SEV-ES
guest. The code was rebased to v5.7-rc3 and got a fair number of changes
since the last version.
What is SEV-ES
==============
SEV-ES is an acronym for 'Secure Encrypted Virtualization - Encrypted
State' and means a hardware feature of AMD processors which hides the
register state of VCPUs to the hypervisor by
2020 Apr 28
116
[PATCH v3 00/75] x86: SEV-ES Guest Support
Hi,
here is the next version of changes to enable Linux to run as an SEV-ES
guest. The code was rebased to v5.7-rc3 and got a fair number of changes
since the last version.
What is SEV-ES
==============
SEV-ES is an acronym for 'Secure Encrypted Virtualization - Encrypted
State' and means a hardware feature of AMD processors which hides the
register state of VCPUs to the hypervisor by
2020 Jul 24
86
[PATCH v5 00/75] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de>
Hi,
here is a rebased version of the latest SEV-ES patches. They are now
based on latest tip/master instead of upstream Linux and include the
necessary changes.
Changes to v4 are in particular:
- Moved early IDT setup code to idt.c, because the idt_descr
and the idt_table are now static
- This required to make stack protector work early (or
2020 Jul 14
92
[PATCH v4 00/75] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de>
Hi,
here is the fourth version of the SEV-ES Guest Support patches. I
addressed the review comments sent to me for the previous version and
rebased the code v5.8-rc5.
The biggest change in this version is the IST handling code for the
#VC handler. I adapted the entry code for the #VC handler to the big
pile of entry code changes merged into
2020 Jul 14
92
[PATCH v4 00/75] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de>
Hi,
here is the fourth version of the SEV-ES Guest Support patches. I
addressed the review comments sent to me for the previous version and
rebased the code v5.8-rc5.
The biggest change in this version is the IST handling code for the
#VC handler. I adapted the entry code for the #VC handler to the big
pile of entry code changes merged into
2020 Aug 24
96
[PATCH v6 00/76] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de>
Hi,
here is the new version of the SEV-ES client enabling patch-set. It is
based on the latest tip/master branch and contains the necessary
changes. In particular those ar:
- Enabling CR4.FSGSBASE early on supported processors so that
early #VC exceptions on APs can be handled.
- Add another patch (patch 1) to fix a KVM frame-size build
2020 Feb 11
83
[RFC PATCH 00/62] Linux as SEV-ES Guest Support
Hi,
here is the first public post of the patch-set to enable Linux to run
under SEV-ES enabled hypervisors. The code is mostly feature-complete,
but there are still a couple of bugs to fix. Nevertheless, given the
size of the patch-set, I think it is about time to ask for initial
feedback of the changes that come with it. To better understand the code
here is a quick explanation of SEV-ES first.
2020 Feb 11
83
[RFC PATCH 00/62] Linux as SEV-ES Guest Support
Hi,
here is the first public post of the patch-set to enable Linux to run
under SEV-ES enabled hypervisors. The code is mostly feature-complete,
but there are still a couple of bugs to fix. Nevertheless, given the
size of the patch-set, I think it is about time to ask for initial
feedback of the changes that come with it. To better understand the code
here is a quick explanation of SEV-ES first.
2020 Sep 07
84
[PATCH v7 00/72] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de>
Hi,
here is a new version of the SEV-ES Guest Support patches for x86. The
previous versions can be found as a linked list starting here:
https://lore.kernel.org/lkml/20200824085511.7553-1-joro at 8bytes.org/
I updated the patch-set based on ther review comments I got and the
discussions around it.
Another important change is that the early IDT
2020 Sep 07
84
[PATCH v7 00/72] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de>
Hi,
here is a new version of the SEV-ES Guest Support patches for x86. The
previous versions can be found as a linked list starting here:
https://lore.kernel.org/lkml/20200824085511.7553-1-joro at 8bytes.org/
I updated the patch-set based on ther review comments I got and the
discussions around it.
Another important change is that the early IDT