Displaying 3 results from an estimated 3 matches for "x86_feature_vmxe".
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x86_feature_vme
2007 Aug 09
0
[PATCH] x86/hvm: miscellaneous CPUID handling changes
...x, &edx);
- ebx &= NUM_THREADS_RESET_MASK;
+ switch ( input )
+ {
+ case 0x00000001:
+ /* Mask off reserved bits. */
+ ecx &= ~VMX_VCPU_CPUID_L1_ECX_RESERVED;
- /* Unsupportable for virtualised CPUs. */
- ecx &= ~(bitmaskof(X86_FEATURE_VMXE) |
- bitmaskof(X86_FEATURE_EST) |
- bitmaskof(X86_FEATURE_TM2) |
- bitmaskof(X86_FEATURE_CID));
+ ebx &= NUM_THREADS_RESET_MASK;
- edx &= ~(bitmaskof(X86_FEATURE_HT) |
- bitmaskof(X86_FEA...
2013 Sep 23
11
[PATCH v4 0/4] x86/HVM: miscellaneous improvements
The first and third patches are cleaned up versions of an earlier v3
submission by Yang.
1: Nested VMX: check VMX capability before read VMX related MSRs
2: VMX: clean up capability checks
3: Nested VMX: fix IA32_VMX_CR4_FIXED1 msr emulation
4: x86: make hvm_cpuid() tolerate NULL pointers
Signed-off-by: Jan Beulich <jbeulich@suse.com>
2011 Aug 15
36
expose MWAIT to dom0
..., &d);
__clear_bit(X86_FEATURE_DTES64 % 32, &c);
- if ( !IS_PRIV(current->domain) )
- __clear_bit(X86_FEATURE_MWAIT % 32, &c);
+ __clear_bit(X86_FEATURE_MWAIT % 32, &c);
__clear_bit(X86_FEATURE_DSCPL % 32, &c);
__clear_bit(X86_FEATURE_VMXE % 32, &c);
__clear_bit(X86_FEATURE_SMXE % 32, &c);
[...]
This then brings a problem to Dom0 which thinks underlying CPU
doesn''t report mwait, and thus notify BIOS to use old I/O based method.
Later a trick is integrated in Jeremy''s pvops tree:
commit 4151815a22...