Displaying 3 results from an estimated 3 matches for "x86_feature_svm".
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x86_feature_svme
2007 Aug 09
0
[PATCH] x86/hvm: miscellaneous CPUID handling changes
...zero when HTT = 0.
* See details on page 23 of AMD CPUID Specification.
*/
- clear_bit(X86_FEATURE_CMP_LEGACY & 31, &ecx);
+ __clear_bit(X86_FEATURE_CMP_LEGACY & 31, &ecx);
/* Make SVM feature invisible to the guest. */
- clear_bit(X86_FEATURE_SVME & 31, &ecx);
+ __clear_bit(X86_FEATURE_SVME & 31, &ecx);
+ __clear_bit(X86_FEATURE_SKINIT & 31, &ecx);
+
+ __clear_bit(X86_FEATURE_OSVW & 31, &ecx);
+ __clear_bit(X86_FEATURE_WDT & 31, &ecx);
/* So far, we do not suppor...
2007 Aug 09
1
[PATCH] svm: allow guest to use EFER.FFXSE and EFER.LMSLE
...efine X86_FEATURE_LM (1*32+29) /* Long Mode (x86-64) */
#define X86_FEATURE_3DNOWEXT (1*32+30) /* AMD 3DNow! extensions */
@@ -93,7 +94,6 @@
#define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */
#define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */
#define X86_FEATURE_SVME (6*32+ 2) /* Secure Virtual Machine */
-#define X86_FEATURE_FFXSR (6*32+25) /* FFXSR instruction optimizations */
#define cpu_has(c, bit) test_bit(bit, (c)->x86_capability)
#define boot_cpu_has(bit) test_bit(bit, boot_cpu_data.x86_capability)
@@ -121,6 +121,7 @@
#define cpu_h...
2010 Aug 05
3
[PATCH 08/14] Nested Virtualization: efer
Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
--
---to satisfy European Law for business letters:
Advanced Micro Devices GmbH
Einsteinring 24, 85609 Dornach b. Muenchen
Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd
Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen
Registergericht Muenchen, HRB Nr. 43632
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