Displaying 5 results from an estimated 5 matches for "x86_feature_pae".
2007 Aug 09
0
[PATCH] x86/hvm: miscellaneous CPUID handling changes
...bled(vcpu_vlapic(v)) )
- clear_bit(X86_FEATURE_APIC & 31, edx);
+ __clear_bit(X86_FEATURE_APIC & 31, edx);
#if CONFIG_PAGING_LEVELS >= 3
if ( !v->domain->arch.hvm_domain.params[HVM_PARAM_PAE_ENABLED] )
#endif
- clear_bit(X86_FEATURE_PAE & 31, edx);
- clear_bit(X86_FEATURE_PSE36 & 31, edx);
- }
- else if ( input == 0x80000001 )
- {
+ __clear_bit(X86_FEATURE_PAE & 31, edx);
+ __clear_bit(X86_FEATURE_PSE36 & 31, edx);
+ break;
+
+ case 0x80000...
2006 May 05
6
PAE mode mismatch in Xen (xen=no Dom0=yes)
...enU. I did a make menuconfig in xen0 and xenU, then did a make in xen-unstable and a make install.
Whilebooting this kernel, I get the above error PAE mode mismatch. I looked under xen/include/asm-x86/processor.h has #define X86_CR4_PAE defined and so does cpufeature.h have this defined. #define X86_FEATURE_PAE
What else should I have done to enable a PAE enabled Xen kernel. I am using xen 3.0.0 (xen-unstable) and cannot move to 3.02 due to xenoprofile not ready there
Thanks
- Padma
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2013 Sep 23
11
[PATCH v4 0/4] x86/HVM: miscellaneous improvements
The first and third patches are cleaned up versions of an earlier v3
submission by Yang.
1: Nested VMX: check VMX capability before read VMX related MSRs
2: VMX: clean up capability checks
3: Nested VMX: fix IA32_VMX_CR4_FIXED1 msr emulation
4: x86: make hvm_cpuid() tolerate NULL pointers
Signed-off-by: Jan Beulich <jbeulich@suse.com>
2007 Apr 18
1
[RFC/PATCH LGUEST X86_64 03/13] lguest64 core
...(unsigned long *)edx;
+ /* Hypervisor needs to know when we flush kernel pages. */
+ set_bit(X86_FEATURE_PGE, features);
+ /* We don't have any features! */
+ clear_bit(X86_FEATURE_VME, features);
+ clear_bit(X86_FEATURE_DE, features);
+ clear_bit(X86_FEATURE_PSE, features);
+ clear_bit(X86_FEATURE_PAE, features);
+ clear_bit(X86_FEATURE_SEP, features);
+ clear_bit(X86_FEATURE_APIC, features);
+ clear_bit(X86_FEATURE_MTRR, features);
+ /* No MWAIT, either */
+ clear_bit(3, excap);
+ }
+}
+
+static unsigned long current_cr3;
+static void lguest_write_cr3(unsigned long cr3)
+{
+ hcall(LHCALL_N...
2007 Apr 18
1
[RFC/PATCH LGUEST X86_64 03/13] lguest64 core
...(unsigned long *)edx;
+ /* Hypervisor needs to know when we flush kernel pages. */
+ set_bit(X86_FEATURE_PGE, features);
+ /* We don't have any features! */
+ clear_bit(X86_FEATURE_VME, features);
+ clear_bit(X86_FEATURE_DE, features);
+ clear_bit(X86_FEATURE_PSE, features);
+ clear_bit(X86_FEATURE_PAE, features);
+ clear_bit(X86_FEATURE_SEP, features);
+ clear_bit(X86_FEATURE_APIC, features);
+ clear_bit(X86_FEATURE_MTRR, features);
+ /* No MWAIT, either */
+ clear_bit(3, excap);
+ }
+}
+
+static unsigned long current_cr3;
+static void lguest_write_cr3(unsigned long cr3)
+{
+ hcall(LHCALL_N...