Displaying 4 results from an estimated 4 matches for "x86_feature_mmxext".
2007 Feb 01
0
[PATCH] hide RDTSCP feature flag from PV guests
...1-16.orig/xen/include/asm-x86/cpufeature.h 2006-04-24 15:28:58.000000000 +0200
+++ 2007-01-16/xen/include/asm-x86/cpufeature.h 2007-02-01 17:25:15.000000000 +0100
@@ -49,6 +49,7 @@
#define X86_FEATURE_MP (1*32+19) /* MP Capable. */
#define X86_FEATURE_NX (1*32+20) /* Execute Disable */
#define X86_FEATURE_MMXEXT (1*32+22) /* AMD MMX extensions */
+#define X86_FEATURE_RDTSCP (1*32+27) /* RDTSCP */
#define X86_FEATURE_LM (1*32+29) /* Long Mode (x86-64) */
#define X86_FEATURE_3DNOWEXT (1*32+30) /* AMD 3DNow! extensions */
#define X86_FEATURE_3DNOW (1*32+31) /* 3DNow! */
_________________________________...
2007 Aug 09
1
[PATCH] svm: allow guest to use EFER.FFXSE and EFER.LMSLE
...8-08.orig/xen/include/asm-x86/cpufeature.h 2007-08-08 11:37:08.000000000 +0200
+++ 2007-08-08/xen/include/asm-x86/cpufeature.h 2007-08-08 11:45:13.000000000 +0200
@@ -49,6 +49,7 @@
#define X86_FEATURE_MP (1*32+19) /* MP Capable. */
#define X86_FEATURE_NX (1*32+20) /* Execute Disable */
#define X86_FEATURE_MMXEXT (1*32+22) /* AMD MMX extensions */
+#define X86_FEATURE_FFXSR (1*32+25) /* FFXSR instruction optimizations */
#define X86_FEATURE_RDTSCP (1*32+27) /* RDTSCP */
#define X86_FEATURE_LM (1*32+29) /* Long Mode (x86-64) */
#define X86_FEATURE_3DNOWEXT (1*32+30) /* AMD 3DNow! extensions */
@@ -93,7 +...
2008 May 06
4
[PATCH] fixup 3dnow! support
...cpu->arch.cpuid_entries[i].padding[2] = 0;
}
vcpu->arch.cpuid_nent = cpuid->nent;
- cpuid_fix_nx_cap(vcpu);
+ cpuid_fix_caps(vcpu);
r = 0;
out_free:
@@ -1061,8 +1075,8 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
bit(X86_FEATURE_LM) |
#endif
bit(X86_FEATURE_MMXEXT) |
- bit(X86_FEATURE_3DNOWEXT) |
- bit(X86_FEATURE_3DNOW);
+ (bit(X86_FEATURE_3DNOWEXT) && cpu_has_3dnowext) |
+ (bit(X86_FEATURE_3DNOW) && cpu_has_3dnow);
const u32 kvm_supported_word3_x86_features =
bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
const u32 kvm_supported_...
2008 May 06
4
[PATCH] fixup 3dnow! support
...cpu->arch.cpuid_entries[i].padding[2] = 0;
}
vcpu->arch.cpuid_nent = cpuid->nent;
- cpuid_fix_nx_cap(vcpu);
+ cpuid_fix_caps(vcpu);
r = 0;
out_free:
@@ -1061,8 +1075,8 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
bit(X86_FEATURE_LM) |
#endif
bit(X86_FEATURE_MMXEXT) |
- bit(X86_FEATURE_3DNOWEXT) |
- bit(X86_FEATURE_3DNOW);
+ (bit(X86_FEATURE_3DNOWEXT) && cpu_has_3dnowext) |
+ (bit(X86_FEATURE_3DNOW) && cpu_has_3dnow);
const u32 kvm_supported_word3_x86_features =
bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
const u32 kvm_supported_...