search for: x86_feature_est

Displaying 4 results from an estimated 4 matches for "x86_feature_est".

Did you mean: x86_feature_ept
2008 May 05
4
[PATCH] Enable Px/Cx related CPUID/MSR bits for dom0
Enable Px/Cx related CPUID/MSR bits for dom0 to get correct Px/Cx info. Signed-off-by: Wei Gang <gang.wei@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
2007 Aug 09
0
[PATCH] x86/hvm: miscellaneous CPUID handling changes
...switch ( input ) + { + case 0x00000001: + /* Mask off reserved bits. */ + ecx &= ~VMX_VCPU_CPUID_L1_ECX_RESERVED; - /* Unsupportable for virtualised CPUs. */ - ecx &= ~(bitmaskof(X86_FEATURE_VMXE) | - bitmaskof(X86_FEATURE_EST) | - bitmaskof(X86_FEATURE_TM2) | - bitmaskof(X86_FEATURE_CID)); + ebx &= NUM_THREADS_RESET_MASK; - edx &= ~(bitmaskof(X86_FEATURE_HT) | - bitmaskof(X86_FEATURE_ACPI) | - bitmaskof(X86_FE...
2011 Nov 30
36
[RFC PATCH] Exporting ACPI Pxx/Cxx states to other kernel subsystems (v1).
Hello, The following patches are a solution to a problem we have encountered when using the Xen hypervisor: - Need Pxx/Cxx states to save on power consumption when using Xen (we do want those datacenters to consume less power!), - Also need to figure out the Turbo mode so that the scheduler can properly boost a core for CPU bound guests. In essence the Xen hypervisor requires that
2011 Aug 15
36
expose MWAIT to dom0
There''re basically two methods to enter a given C-state: legacy (hlt + I/O read), and native(using mwait). MWAIT is always preferred when both underlying CPU and OS support, which is a more efficient way to conduct C-state transition. Xen PM relies on Dom0 to parse ACPI Cx/Px information, which involves one step to notify BIOS about a set of capabilities supported by OSPM. One