Displaying 3 results from an estimated 3 matches for "x86_feature_dtes64".
2013 Mar 12
0
[PATCH] vpmu intel: pass through cpuid bits when BTS is enabled
Hi,
this patch passes the orginal cpuid bits for X86_FEATURE_DTES64
(64-bit DS Area) and X86_FEATURE_DSCPL (CPL Qualified Debug Store) to the
guest when the BTS feature is switched on.
I forgot this when I did this BTS emulation.
Thanks.
Dietmar.
Signed-off-by: Dietmar Hahn <dietmar.hahn@ts.fujitsu.com>
diff -r a6b81234b189 xen/arch/x86/hvm/vmx/vpmu_core...
2013 Dec 13
0
[PATCH v2] pvh: disable MTRR feature on cpuid for Dom0
...,8 @@ void pv_cpuid(struct cpu_user_regs *regs)
__clear_bit(X86_FEATURE_DS, &d);
__clear_bit(X86_FEATURE_ACC, &d);
__clear_bit(X86_FEATURE_PBE, &d);
+ if ( is_pvh_vcpu(current) )
+ __clear_bit(X86_FEATURE_MTRR, &d);
__clear_bit(X86_FEATURE_DTES64 % 32, &c);
__clear_bit(X86_FEATURE_MWAIT % 32, &c);
--
1.7.7.5 (Apple Git-26)
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2011 Aug 15
36
expose MWAIT to dom0
...5bfce -r 777f294e3be8 xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c Tue May 06 10:19:10 2008 +0100
+++ b/xen/arch/x86/traps.c Tue May 06 10:25:34 2008 +0100
@@ -713,8 +713,7 @@ static int emulate_forced_invalid_op(str
__clear_bit(X86_FEATURE_PBE, &d);
__clear_bit(X86_FEATURE_DTES64 % 32, &c);
- if ( !IS_PRIV(current->domain) )
- __clear_bit(X86_FEATURE_MWAIT % 32, &c);
+ __clear_bit(X86_FEATURE_MWAIT % 32, &c);
__clear_bit(X86_FEATURE_DSCPL % 32, &c);
__clear_bit(X86_FEATURE_VMXE % 32, &c);
__clear_bit...