search for: x86_feature_de

Hi, this patch passes the orginal cpuid bits for X86_FEATURE_DTES64 (64-bit DS Area) and X86_FEATURE_DSCPL (CPL Qualified Debug Store) to the guest when the BTS feature is switched on. I forgot this when I did this BTS emulation. Thanks. Dietmar. Signed-off-by: Dietmar Hahn <dietmar.hahn@ts.fujitsu.com> diff -r a6b81234b189 xen/arch/x86/hvm/vmx/vpmu_core2.c ---

MTRR is not available for PVH Dom0, so prevent cpuid from reporting it as an available feature. Signed-off-by: Roger Pau Monné <roger.pau@citrix.com> Cc: George Dunlap <george.dunlap@eu.citrix.com> Cc: Mukesh Rathor <mukesh.rathor@oracle.com> Cc: Jan Beulich <JBeulich@suse.com> Cc: Keir Fraser <keir@xen.org> --- This should go in after Mukesh Dom0 series, or merged

...=================================================================== --- 2007-08-08.orig/xen/arch/x86/traps.c 2007-07-04 12:13:16.000000000 +0200 +++ 2007-08-08/xen/arch/x86/traps.c 2007-08-08 11:37:08.000000000 +0200 @@ -609,16 +609,21 @@ static int emulate_forced_invalid_op(str clear_bit(X86_FEATURE_DE, &d); clear_bit(X86_FEATURE_PSE, &d); clear_bit(X86_FEATURE_PGE, &d); + if ( !cpu_has_sep ) + clear_bit(X86_FEATURE_SEP, &d); +#ifdef __i386__ if ( !supervisor_mode_kernel ) clear_bit(X86_FEATURE_SEP, &d); +#endif...

The first and third patches are cleaned up versions of an earlier v3 submission by Yang. 1: Nested VMX: check VMX capability before read VMX related MSRs 2: VMX: clean up capability checks 3: Nested VMX: fix IA32_VMX_CR4_FIXED1 msr emulation 4: x86: make hvm_cpuid() tolerate NULL pointers Signed-off-by: Jan Beulich <jbeulich@suse.com>

...if (is_feature) { + unsigned long *excap = (unsigned long *)ecx, + *features = (unsigned long *)edx; + /* Hypervisor needs to know when we flush kernel pages. */ + set_bit(X86_FEATURE_PGE, features); + /* We don't have any features! */ + clear_bit(X86_FEATURE_VME, features); + clear_bit(X86_FEATURE_DE, features); + clear_bit(X86_FEATURE_PSE, features); + clear_bit(X86_FEATURE_PAE, features); + clear_bit(X86_FEATURE_SEP, features); + clear_bit(X86_FEATURE_APIC, features); + clear_bit(X86_FEATURE_MTRR, features); + /* No MWAIT, either */ + clear_bit(3, excap); + } +} + +static unsigned long...

...if (is_feature) { + unsigned long *excap = (unsigned long *)ecx, + *features = (unsigned long *)edx; + /* Hypervisor needs to know when we flush kernel pages. */ + set_bit(X86_FEATURE_PGE, features); + /* We don't have any features! */ + clear_bit(X86_FEATURE_VME, features); + clear_bit(X86_FEATURE_DE, features); + clear_bit(X86_FEATURE_PSE, features); + clear_bit(X86_FEATURE_PAE, features); + clear_bit(X86_FEATURE_SEP, features); + clear_bit(X86_FEATURE_APIC, features); + clear_bit(X86_FEATURE_MTRR, features); + /* No MWAIT, either */ + clear_bit(3, excap); + } +} + +static unsigned long...

There''re basically two methods to enter a given C-state: legacy (hlt + I/O read), and native(using mwait). MWAIT is always preferred when both underlying CPU and OS support, which is a more efficient way to conduct C-state transition. Xen PM relies on Dom0 to parse ACPI Cx/Px information, which involves one step to notify BIOS about a set of capabilities supported by OSPM. One capability

Unlike full virtualization in which the virtual machine provides the same platform interface as running natively on the hardware, paravirtualization requires modification to the guest operating system to work with the platform interface provided by the hypervisor. Xen was designed with performance in mind. Calls to the hypervisor are minimized, batched if necessary, and non-critical codepaths

Unlike full virtualization in which the virtual machine provides the same platform interface as running natively on the hardware, paravirtualization requires modification to the guest operating system to work with the platform interface provided by the hypervisor. Xen was designed with performance in mind. Calls to the hypervisor are minimized, batched if necessary, and non-critical codepaths