Displaying 2 results from an estimated 2 matches for "x86_feature_cmp_legacy".
2007 Aug 09
0
[PATCH] x86/hvm: miscellaneous CPUID handling changes
...lear_bit(X86_FEATURE_PSE36 & 31, &edx);
+ __clear_bit(X86_FEATURE_PSE36 & 31, &edx);
/* Clear the Cmp_Legacy bit
* This bit is supposed to be zero when HTT = 0.
* See details on page 23 of AMD CPUID Specification.
*/
- clear_bit(X86_FEATURE_CMP_LEGACY & 31, &ecx);
+ __clear_bit(X86_FEATURE_CMP_LEGACY & 31, &ecx);
/* Make SVM feature invisible to the guest. */
- clear_bit(X86_FEATURE_SVME & 31, &ecx);
+ __clear_bit(X86_FEATURE_SVME & 31, &ecx);
+ __clear_bit(X86_FEATURE_SKINIT...
2007 Aug 09
1
[PATCH] svm: allow guest to use EFER.FFXSE and EFER.LMSLE
...truction optimizations */
#define X86_FEATURE_RDTSCP (1*32+27) /* RDTSCP */
#define X86_FEATURE_LM (1*32+29) /* Long Mode (x86-64) */
#define X86_FEATURE_3DNOWEXT (1*32+30) /* AMD 3DNow! extensions */
@@ -93,7 +94,6 @@
#define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */
#define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */
#define X86_FEATURE_SVME (6*32+ 2) /* Secure Virtual Machine */
-#define X86_FEATURE_FFXSR (6*32+25) /* FFXSR instruction optimizations */
#define cpu_has(c, bit) test_bit(bit, (c)->x86_capability)
#define boot_cpu_has(bit) test_...